ZHCSG67A March 2017 – December 2018 OPT3001-Q1
The OPT3001-Q1 device operates as a slave device on both the I2C bus and SMBus. Connections to the bus are made via the SCL clock input line and the SDA open-drain I/O line. The OPT3001-Q1 device supports the transmission protocol for standard mode (up to 100 kHz), fast mode (up to 400 kHz), and high-speed mode (up to 2.6 MHz). All data bytes are transmitted most-significant bits first.
The SDA and SCL pins feature integrated spike-suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise. See the Electrical Interface section for further details of the I2C bus noise immunity.