ZHCSCY8B
July 2014 – March 2018
ONET2804T
PRODUCTION DATA.
1
特性
2
应用
3
说明
Device Images
简化原理图
眼图
4
修订历史记录
5
Pin Configuration and Functions
Bond Pad Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
DC Electrical Characteristics
6.5
AC Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Signal Path
7.3.2
Gain Adjustment
7.3.3
Amplitude Adjustment
7.3.4
Rate Select
7.3.5
Threshold Adjustment
7.3.6
Filter Circuitry
7.3.7
AGC and RSSI
7.4
Device Functional Modes
7.4.1
Pad Control
7.4.2
2-Wire Interface Control
7.4.3
2-Wire Interface and Control Logic
7.4.4
Bus Idle
7.4.5
Start Data Transfer
7.4.6
Stop Data Transfer
7.4.7
Data Transfer
7.4.8
Acknowledge
7.5
Register Maps
7.5.1
Register 0 (0x00) – Control Settings (offset = 0h) [reset = 0h]
Table 2.
Register 0 (0x00) – Control Settings Field Descriptions
7.5.2
Register 1 (0x01) – Amplitude and Rate for Channel 1 (offset = 1h) [reset = 0h]
Table 3.
Register 1 (0x01) – Amplitude and Rate for Channel 1 Field Descriptions
7.5.3
Register 2 (0x02) Mapping – Threshold and Gain for Channel 1 (offset = 2h) [reset = 0h]
Table 4.
Register 2 (0x02) – Threshold and Gain for Channel 1
7.5.4
Register 3 (0x03) – Reserved
Table 5.
Register 3 (0x03) – Reserved Field Descriptions
7.5.5
Register 4 (0x04) – Reserved
Table 6.
Register 4 (0x04) – Reserved Field Descriptions
7.5.6
Register 5 (0x05) – Reserved
Table 7.
Register 5 (0x05) – Reserved Field Descriptions
7.5.7
Register 6 (0x06) – Reserved
Table 8.
Register 6 (0x06) – Reserved Field Descriptions
7.5.8
Register 7 (0x07) – Amplitude and Rate for Channel 2 (offset = 7h) [reset = 0h]
Table 9.
Register 7 (0x07) – Amplitude and Rate for Channel 2 Field Descriptions
7.5.9
Register 8 (0x08) Mapping – Threshold and Gain for Channel 1 (offset = 8h) [reset = 0h]
Table 10.
Register 8 (0x08) – Threshold and Gain for Channel 2
7.5.10
Register 9 (0x09) – Reserved
Table 11.
Register 9 (0x09) – Reserved Field Descriptions
7.5.11
Register 10 (0x0A) – Reserved
Table 12.
Register 10 (0x0A) – Reserved Field Descriptions
7.5.12
Register 11 (0x0B) – Reserved
Table 13.
Register 11 (0x0B) – Reserved Field Descriptions
7.5.13
Register 12 (0x0C) – Reserved
Table 14.
Register 12 (0x0C) – Reserved Field Descriptions
7.5.14
Register 13 (0x0D) – Amplitude and Rate for Channel 3 (offset = Dh) [reset = 0h]
Table 15.
Register 13 (0x0D) – Amplitude and Rate for Channel 3 Field Descriptions
7.5.15
Register 14 (0x0E) Mapping – Threshold and Gain for Channel 3 (offset = Eh) [reset = 0h]
Table 16.
Register 14 (0x0E) – Threshold and Gain for Channel 3
7.5.16
Register 15 (0x0F) – Reserved
Table 17.
Register 15 (0x0F) – Reserved Field Descriptions
7.5.17
Register 16 (0x10) – Reserved
Table 18.
Register 16 (0x10) – Reserved Field Descriptions
7.5.18
Register 17 (0x11) – Reserved
Table 19.
Register 17 (0x11) – Reserved Field Descriptions
7.5.19
Register 18 (0x12) – Reserved
Table 20.
Register 18 (0x12) – Reserved Field Descriptions
7.5.20
Register 19 (0x13) – Amplitude and Rate for Channel 4 (offset = 13h ) [reset = 0h]
Table 21.
Register 19 (0x13) – Amplitude and Rate for Channel 4 Field Descriptions
7.5.21
Register 20 (0x14) Mapping – Threshold and Gain for Channel 4 (offset =14h) [reset = 0h]
Table 22.
Register 20 (0x14) – Threshold and Gain for Channel 4
7.5.22
Register 21 (0x15) – Reserved
Table 23.
Register 21 (0x15) – Reserved Field Descriptions
7.5.23
Register 22 (0x10) – Reserved
Table 24.
Register 21 (0x10) – Reserved Field Descriptions
7.5.24
Register 23 (0x17) – Reserved
Table 25.
Register 23 (0x17) – Reserved Field Descriptions
7.5.25
Register 24 (0x18) – Reserved
Table 26.
Register 24 (0x18) – Reserved Field Descriptions
7.5.26
Register 25 (0x19) – Reserved
Table 27.
Register 25 (0x19) – Reserved Field Descriptions
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
Typical Application, Pad Control
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Application Curves
8.2.2
Typical Application, 2-Wire Control
8.2.2.1
Design Requirements
8.2.2.2
Detailed Design Procedure
8.2.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
器件和文档支持
11.1
接收文档更新通知
11.2
社区资源
11.3
商标
11.4
静电放电警告
11.5
Glossary
12
机械、封装和可订购信息
封装选项
机械数据 (封装 | 引脚)
Y|0
散热焊盘机械数据 (封装 | 引脚)
订购信息
zhcscy8b_oa
1
特性
4 通道多速率运行,最高达 28Gbps
10kΩ 差分互阻抗
21GHz 带宽
1.8μA
rms
输入引入噪声
2.9mA
PP
输入过载电流
可编程输出电压
可调增益和带宽
用于每个通道的接收信号强度指示器 (RSSI)
通道间 40dB 隔离(仅限芯片)
3.3V 单电源
每通道 139mW
引脚控制或 2 线控制
片上滤波器电容
工作温度范围 -40°C 至 100°C
芯片尺寸:3250μm × 1450μm,750μm 通道间距