ZHCSEV2C January   2016  – September 2016 MUX508 , MUX509

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: Dual Supply
    6. 7.6 Electrical Characteristics: Single Supply
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1  Truth Tables
    2. 8.2  On-Resistance
    3. 8.3  Off-Leakage Current
    4. 8.4  On-Leakage Current
    5. 8.5  Transition Time
    6. 8.6  Break-Before-Make Delay
    7. 8.7  Turn-On and Turn-Off Time
    8. 8.8  Charge Injection
    9. 8.9  Off Isolation
    10. 8.10 Channel-to-Channel Crosstalk
    11. 8.11 Bandwidth
    12. 8.12 THD + Noise
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Ultralow Leakage Current
      2. 9.3.2 Ultralow Charge Injection
      3. 9.3.3 Bidirectional Operation
      4. 9.3.4 Rail-to-Rail Operation
    4. 9.4 Device Functional Modes
  10. 10Applications and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power-Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 文档支持
      1. 13.1.1 相关文档　
    2. 13.2 相关链接
    3. 13.3 接收文档更新通知
    4. 13.4 社区资源
    5. 13.5 商标
    6. 13.6 静电放电警告
    7. 13.7 Glossary
  14. 14机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

9 Detailed Description

9.1 Overview

The MUX50x are a family of analog multiplexers. The Functional Block Diagram section provides a top-level block diagram of both the MUX508 and MUX509. The MUX508 is an eight-channel, single-ended, analog mux. The MUX509 is a four-channel, differential or dual 4:1, single-ended, analog mux. Each channel is turned on or turned off based on the state of the address lines and enable pin.

9.2 Functional Block Diagram

MUX508 MUX509 fbd_sbas758.gif

9.3 Feature Description

9.3.1 Ultralow Leakage Current

The MUX50x provide extremely low on- and off-leakage currents. The MUX50x are capable of switching signals from high source-impedance inputs into a high input-impedance op amp with minimal offset error because of these ultralow leakage currents. Figure 37 shows typical leakage currents of the MUX50x versus temperature.

MUX508 MUX509 C006_SBOS705.png Figure 37. Leakage Current vs Temperature

9.3.2 Ultralow Charge Injection

The MUX50x have a simple transmission gate topology, as shown in Figure 38. Any mismatch in the stray capacitance associated with the NMOS and PMOS transistors creates an output level change whenever the switch is opened or closed.

MUX508 MUX509 Transmission_Gate.gif Figure 38. Transmission Gate Topology

The MUX50x have special charge-injection cancellation circuitry that reduces the source-to-drain charge injection to as low as 0.3 pC at VS = 0 V, and ±0.6 pC in the full signal range, as shown in Figure 39.

MUX508 MUX509 C025_SBOS705.png Figure 39. Source-to-Drain Charge Injection vs Source or Drain voltage

The drain-to-source charge injection becomes important when the device is used as a demultiplexer (demux), where D becomes the input and Sx becomes the output. Figure 40 shows the drain-to-source charge injection across the full signal range.

MUX508 MUX509 C011_SBOS705.png Figure 40. Drain-to-Source Charge Injection vs Source or Drain voltage

9.3.3 Bidirectional Operation

The MUX50x are operable as both a mux or demux. The source (Sx, SxA, SxB) and drain (D, DA, DB) pins of the MUX50x are used either as input or output. Each MUX50x channel has very similar characteristics in both directions.

9.3.4 Rail-to-Rail Operation

A valid analog signal for the MUX50x ranges from VSS to VDD. The input signal to the MUX50x can swing from VSS to VDD without any significant degradation in performance. The on-resistance of the MUX50x varies with input signal, as shown in Figure 41.

MUX508 MUX509 C001_SBOS705.png Figure 41. On-Resistance vs Source or Drain Voltage

9.4 Device Functional Modes

When the EN pin of the MUX50x is pulled high, one of the switches is closed based on the state of the address lines. When the EN pin is pulled low, all the switches are in an open state irrespective of the state of the address lines. The EN pin can be connected to VDD (as high as 36 V).