ZHCSHI9B December 2017 – June 2019 MSP432P4011T , MSP432P401VT , MSP432P401YT , MSP432P4111T , MSP432P411VT , MSP432P411YT
PRODUCTION DATA.
PARAMETER | TEST CONDITIONS | VCORE | VCC | MIN | MAX | UNIT | |
---|---|---|---|---|---|---|---|
tSTE,LEAD | STE lead time, STE active to clock | UCSTEM = 1,
UCMODEx = 01 or 10 |
1.2 V | 1 | UCxCLK cycles | ||
tSTE,LAG | STE lag time, Last clock to STE inactive | UCSTEM = 1,
UCMODEx = 01 or 10 |
1.2 V | 1 | |||
tSTE,ACC | STE access time, STE active to SIMO data out | UCSTEM = 0,
UCMODEx = 01 or 10 |
1.2 V | 1.62 V | 30 | ns | |
3.7 V | 20 | ||||||
tSTE,DIS | STE disable time, STE inactive to SIMO high impedance | UCSTEM = 0,
UCMODEx = 01 or 10 |
1.2 V | 1.62 V | 20 | ns | |
3.7 V | 15 | ||||||
tSU,MI | SOMI input data setup time | 1.2 V | 1.62 V | 45 | ns | ||
3.7 V | 35 | ||||||
tHD,MI | SOMI input data hold time | 1.2 V | 1.62 V | 0 | ns | ||
3.7 V | 0 | ||||||
tVALID,MO | SIMO output data valid time(2) | UCLK edge to SIMO valid,
CL = 20 pF |
1.2 V | 1.62 V | 14 | ns | |
3.7 V | 7 | ||||||
tHD,MO | SIMO output data hold time(3) | CL = 20 pF | 1.2 V | 1.62 V | 0 | ns | |
3.7 V | 0 |
Table 5-43 lists the characteristics of the eUSCI in SPI slave mode.