ZHCSHI9B December 2017 – June 2019 MSP432P4011T , MSP432P401VT , MSP432P401YT , MSP432P4111T , MSP432P411VT , MSP432P411YT
PRODUCTION DATA.
Figure 6-19 shows the port schematic. Table 6-81 lists the settings to select the pin function.
PIN NAME (P7.x) | x | FUNCTION | CONTROL BITS OR SIGNALS(1) | |||
---|---|---|---|---|---|---|
P7DIR.x | P7SEL1.x | P7SEL0.x | P7MAPx | |||
P7.4/PM_TA1.4/C0.5/L31(5) | 4 | P7.4 (I/O) | I: 0; O: 1 | 0 | 0 | X |
TA1.CCI4A | 0 | 0 | 1 | default | ||
TA1.4 | 1 | |||||
L31(4) | X | 1 | 0 | X | ||
C0.5(2)(3)(4) | X | 1 | 1 | X | ||
P7.5/PM_TA1.3/C0.4/L30(5) | 5 | P7.5 (I/O) | I: 0; O: 1 | 0 | 0 | X |
TA1.CCI3A | 0 | 0 | 1 | default | ||
TA1.3 | 1 | |||||
L30(4) | X | 1 | 0 | X | ||
C0.4(2)(3)(4) | X | 1 | 1 | X | ||
P7.6/PM_TA1.2/C0.3/L29(5) | 6 | P7.6 (I/O) | I: 0; O: 1 | 0 | 0 | X |
TA1.CCI2A | 0 | 0 | 1 | default | ||
TA1.2 | 1 | |||||
L29(4) | X | 1 | 0 | X | ||
C0.3(2)(3)(4) | X | 1 | 1 | X | ||
P7.7/PM_TA1.1/C0.2/L28(5) | 7 | P7.7 (I/O) | I: 0; O: 1 | 0 | 0 | X |
TA1.CCI1A | 0 | 0 | 1 | default | ||
TA1.1 | 1 | |||||
L28(4) | X | 1 | 0 | X | ||
C0.2(2)(3)(4) | X | 1 | 1 | X |