ZHCSHI9B December 2017 – June 2019 MSP432P4011T , MSP432P401VT , MSP432P401YT , MSP432P4111T , MSP432P411VT , MSP432P411YT
PRODUCTION DATA.
Pin schematic: see Figure 6-13
Table 6-74 lists the settings to select the pin function.
PIN NAME (P8.x) | x | FUNCTION | CONTROL BITS OR SIGNALS(1) | ||
---|---|---|---|---|---|
P8DIR.x | P8SEL1.x | P8SEL0.x | |||
P8.2/TA3.2/A23/L47(3) | 2 | P8.2 (I/O) | I: 0; O: 1 | 0 | 0 |
TA3.CCI2A | 0 | 0 | 1 | ||
TA3.2 | 1 | ||||
L47(4) | X | 1 | 0 | ||
A23(2) | X | 1 | 1 | ||
P8.3/TA3CLK/A22/L46(3) | 3 | P8.3 (I/O) | I: 0; O: 1 | 0 | 0 |
TA3CLK | 0 | 0 | 1 | ||
DVSS | 1 | ||||
L46(4) | X | 1 | 0 | ||
A22(2) | X | 1 | 1 | ||
P8.4/A21/L45(3) | 4 | P8.4 (I/O) | I: 0; O: 1 | 0 | 0 |
N/A | 0 | 0 | 1 | ||
DVSS | 1 | ||||
L45(4) | X | 1 | 0 | ||
A21(2) | X | 1 | 1 | ||
P8.5/A20/L44(3) | 5 | P8.5 (I/O) | I: 0; O: 1 | 0 | 0 |
N/A | 0 | 0 | 1 | ||
DVSS | 1 | ||||
L44(4) | X | 1 | 0 | ||
A20(2) | X | 1 | 1 | ||
P8.6/A19/L19(3) | 6 | P8.6 (I/O) | I: 0; O: 1 | 0 | 0 |
N/A | 0 | 0 | 1 | ||
DVSS | 1 | ||||
L19(4) | X | 1 | 0 | ||
A19(2) | X | 1 | 1 | ||
P8.7/A18/L18(3) | 7 | P8.7 (I/O) | I: 0; O: 1 | 0 | 0 |
N/A | 0 | 0 | 1 | ||
DVSS | 1 | ||||
L18(4) | X | 1 | 0 | ||
A18(2) | X | 1 | 1 |
NOTE
On pins with ADC and LCD multiplexing, make sure that only one of these functions is enabled at any time.