ZHCSHI9B December 2017 – June 2019 MSP432P4011T , MSP432P401VT , MSP432P401YT , MSP432P4111T , MSP432P411VT , MSP432P411YT
PRODUCTION DATA.
Pin schematic: see Figure 6-8
Table 6-64 lists the settings to select the pin function.
PIN NAME (P9.x) | x | FUNCTION | CONTROL BITS OR SIGNALS(1) | ||
---|---|---|---|---|---|
P9DIR.x | P9SEL1.x | P9SEL0.x | |||
P9.4/UCA3STE/L43(3) | 4 | P9.4 (I/O) | I: 0; O: 1 | 0 | 0 |
UCA3STE | X(2) | 0 | 1 | ||
L43(4) | X | 1 | 0 | ||
N/A | 0 | 1 | 1 | ||
DVSS | 1 | ||||
P9.5/UCA3CLK/L42(3) | 5 | P9.5 (I/O) | I: 0; O: 1 | 0 | 0 |
UCA3CLK | X(2) | 0 | 1 | ||
L42(4) | X | 1 | 0 | ||
N/A | 0 | 1 | 1 | ||
DVSS | 1 | ||||
P9.6/UCA3RXD/UCA3SOMI/L41(3) | 6 | P9.6 (I/O) | I: 0; O: 1 | 0 | 0 |
UCA3RXD/UCA3SOMI | X(2) | 0 | 1 | ||
L41(4) | X | 1 | 0 | ||
N/A | 0 | 1 | 1 | ||
DVSS | 1 | ||||
P9.7/UCA3TXD/UCA3SIMO/L40(3) | 7 | P9.7 (I/O) | I: 0; O: 1 | 0 | 0 |
UCA3TXD/UCA3SIMO | X(2) | 0 | 1 | ||
L40(4) | X | 1 | 0 | ||
N/A | 0 | 1 | 1 | ||
DVSS | 1 |