ZHCSHI9B December 2017 – June 2019 MSP432P4011T , MSP432P401VT , MSP432P401YT , MSP432P4111T , MSP432P411VT , MSP432P411YT
PRODUCTION DATA.
Table 6-59 lists the software configuration for the Dhrystone test.
Items | Details |
---|---|
Compiler Name and Version | Keil uVision Arm Compiler v5.06(build 20) |
Compiler Flags | -c --cpu Cortex-M4.fp -g -O3 -Otime --apcs=interwork --asm --interleave --asm_dir |
Dhrystone Profile and Version | v2.1 |
Table 6-60 lists the profile configuration for the Dhrystone test.
Configuration | Details |
---|---|
Active Power Mode Name | Active mode |
Active Mode Clock Configuration | CPU: 3 MHz |
Active Mode Voltage Integrity | 1.62 V |