ZHCSHI9B December 2017 – June 2019 MSP432P4011T , MSP432P401VT , MSP432P401YT , MSP432P4111T , MSP432P411VT , MSP432P411YT
PRODUCTION DATA.
In the case of the Arm µDMA controller, it is usually the responsibility of software to maintain a list of channels that have completed their operation. To provide more flexibility, MSP432P4x1xT DMA supports four DMA completion interrupts, which are mapped as follows:
NOTE
Software must ensure that DMA_INT1, DMA_INT2, and DMA_INT3 are mapped to different channels, so that the same channel does not result in multiple interrupts.