ZHCSH72I September 2011 – December 2017 LMK00301

PRODUCTION DATA.

- 1 特性
- 2 应用
- 3 说明
- 4 修订历史记录
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Parameter Measurement Information
- 9 Detailed Description
- 10Application and Implementation
- 11Power Supply Recommendations
- 12器件和文档支持
- 13机械、封装和可订购信息

The current consumption values specified in *Electrical Characteristics* can be used to calculate the total power dissipation and IC power dissipation for any device configuration. The total V_{CC} core supply current (I_{CC_TOTAL}) can be calculated using Equation 5:

Equation 5. **I**_{CC_TOTAL} = I_{CC_CORE} + I_{CC_BANK_A} + I_{CC_BANK_B} + I_{CC_CMOS}

where

- I
_{CC_CORE}is the current for core logic and input blocks and depends on selected input (CLKinX or OSCin). - I
_{CC_BANK_A}is the current for Bank A and depends on output type (I_{CC_PECL}, I_{CC_LVDS}, I_{CC_HCSL}, or 0 mA if disabled). - I
_{CC_BANK_B}is the current for Bank B and depends on output type (I_{CC_PECL}, I_{CC_LVDS}, I_{CC_HCSL}, or 0 mA if disabled). - I
_{CC_CMOS}is the current for the LVCMOS output (or 0 mA if REFout is disabled).

Since the output supplies (V_{CCOA}, V_{CCOB}, V_{CCOC}) can be powered from 3 independent voltages, the respective output supply currents (I_{CCO_BANK_A}, I_{CCO_BANK_B}, I_{CCO_CMOS}) should be calculated separately.

I_{CCO_BANK} for either Bank A or B can be directly taken from the corresponding output supply current specification (I_{CCO_PECL}, I_{CCO_LVDS}, or I_{CCO_HCSL}) **provided the output loading matches the specified conditions**. Otherwise, I_{CCO_BANK} should be calculated as follows:

Equation 6. I_{CCO_BANK} = I_{BANK_BIAS} + (N * I_{OUT_LOAD})

where

- I
_{BANK_BIAS}is the output bank bias current (fixed value). - I
_{OUT_LOAD}is the DC load current per loaded output pair. - N is the number of loaded output pairs in the bank (N = 0 to 5).

Table 6 shows the typical I_{BANK_BIAS} values and I_{OUT_LOAD} expressions for the 3 differential output types.

For LVPECL, it is possible to use a larger termination resistor (R_{T}) to ground instead of terminating with 50 Ω to V_{TT} = Vcco - 2 V; this technique is commonly used to eliminate the extra termination voltage supply (V_{TT}) and potentially reduce device power dissipation at the expense of lower output swing. For example, when Vcco is 3.3 V, a R_{T} value of 160 Ω to ground will eliminate the 1.3 V termination supply without sacrificing much output swing. In this case, the typical I_{OUT_LOAD} is 25 mA, so I_{CCO_PECL} for a fully-loaded bank reduces to 158 mA (vs. 165 mA with 50 Ω resistors to Vcco - 2 V).

CURRENT PARAMETER | LVPECL | LVDS | HCSL |
---|---|---|---|

I_{BANK_BIAS} |
33 mA | 34 mA | 6 mA |

I_{OUT_LOAD} |
(V_{OH} - V_{TT})/R_{T} + (V_{OL} - V_{TT})/R_{T} |
0 mA (No DC load current) | V_{OH}/R_{T} |

Once the current consumption is calculated or known for each supply, the total power dissipation (P_{TOTAL}) can be calculated as:

Equation 7. ** P**_{TOTAL} = (V_{CC}*I_{CC_TOTAL}) + (V_{CCOA}*I_{CCO_BANK_A}) + (V_{CCOB}*I_{CCO_BANK_B}) + (V_{CCOC}*I_{CCO_CMOS})

If the device configuration has LVPECL or HCSL outputs, then it is also necessary to calculate the power dissipated in any termination resistors (P_{RT_ PECL} and P_{RT_HCSL}) and in any termination voltages (P_{VTT}). The external power dissipation values can be calculated as follows:

Equation 8. **P**_{RT_PECL} (per LVPECL pair) = (V_{OH} - V_{TT})^{2}/R_{T} + (V_{OL} - V_{TT})^{2}/R_{T}

Equation 9. ** P**_{VTT_PECL} (per LVPECL pair) = V_{TT} * [(V_{OH} - V_{TT})/R_{T} + (V_{OL} - V_{TT})/R_{T}]

Equation 10. **P**_{RT_HCSL} (per HCSL pair) = V_{OH}^{2} / R_{T}

Finally, the IC power dissipation (P_{DEVICE}) can be computed by subtracting the external power dissipation values from P_{TOTAL} as follows:

Equation 11. **P**_{DEVICE} = P_{TOTAL} - N_{1}*(P_{RT_PECL} + P_{VTT_PECL}) - N_{2}*P_{RT_HCSL}

where

- N
_{1}is the number of LVPECL output pairs with termination resistors to V_{TT}(usually Vcco - 2 V or GND). - N
_{2}is the number of HCSL output pairs with termination resistors to GND.