ZHCSID5E April   2018  – September 2019 ISO1410 , ISO1412 , ISO1430 , ISO1432 , ISO1450 , ISO1452

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     简化应用电路原理图
  4. 4 修订历史记录
  5. 5 说明 （续）
  6. 6 Device Options
  7. 7 Pin Configuration and Functions
    1.     Pin Functions: Full-Duplex Device
    2.     Pin Functions: Half-Duplex Device
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information
    5. 8.5  Power Ratings
    6. 8.6  Insulation Specifications
    7. 8.7  Safety-Related Certifications
    8. 8.8  Safety Limiting Values
    9. 8.9  Electrical Characteristics: Driver
    10. 8.10 Electrical Characteristics: Receiver
    11. 8.11 Supply Current Characteristics: Side 1 (ICC1)
    12. 8.12 Supply Current Characteristics: Side 2 (ICC2)
    13. 8.13 Switching Characteristics: Driver
    14. 8.14 Switching Characteristics: Receiver
    15. 8.15 Insulation Characteristics Curves
    16. 8.16 Typical Characteristics
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1 Electromagnetic Compatibility (EMC) Considerations
      2. 10.3.2 Failsafe Receiver
      3. 10.3.3 Thermal Shutdown
      4. 10.3.4 Glitch-Free Power Up and Power Down
    4. 10.4 Device Functional Modes
      1. 10.4.1 Device I/O Schematics
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
        1. 11.2.2.1 Data Rate and Bus Length
        2. 11.2.2.2 Stub Length
        3. 11.2.2.3 Bus Loading
      3. 11.2.3 Application Curves
        1. 11.2.3.1 Insulation Lifetime
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
      1. 13.1.1 PCB Material
    2. 13.2 Layout Example
  14. 14器件和文档支持
    1. 14.1 文档支持
      1. 14.1.1 相关文档
    2. 14.2 相关链接
    3. 14.3 接收文档更新通知
    4. 14.4 社区资源
    5. 14.5 商标
    6. 14.6 静电放电警告
    7. 14.7 Glossary
  15. 15机械、封装和可订购信息

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DW|16
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.13 Switching Characteristics: Driver

All typical specs are at VCC1=3.3V, VCC2=5V, TA=27°C, (Min/Max specs are over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
500-kbps DEVICES
tr, tf Differential output rise time and fall time RL = 54 Ω, CL = 50 pF, see Figure 37 460 680 ns
tPHL, tPLH Propagation delay RL = 54 Ω, CL = 50 pF, see Figure 37 310 570 ns
PWD Pulse width distortion(1), |tPHL – tPLH| RL = 54 Ω, CL = 50 pF, see Figure 37 4 50 ns
tPHZ, tPLZ Disable time See Figure 40, and Figure 41 125 200 ns
tPZH, tPZL Enable time See Figure 40, and Figure 41 160 600 ns
12-Mbps DEVICES
tr, tf Differential output rise time and fall time RL = 54 Ω, CL = 50 pF, VCC2= 4.5 V to 5.5 V, see Figure 37 10 25 ns
RL = 54 Ω, CL = 50 pF, VCC2= 3 V to 3.6 V, see Figure 37 27.8 ns
tPHL, tPLH Propagation delay RL = 54 Ω, CL = 50 pF, see Figure 37 68 125 ns
PWD Pulse width distortion(1), |tPHL – tPLH| RL = 54 Ω, CL = 50 pF, see Figure 37 2 10 ns
tPHZ, tPLZ Disable time See Figure 40, and Figure 41 75 125 ns
tPZH, tPZL Enable time See Figure 40, and Figure 41 75 160 ns
50-Mbps DEVICES
tr, tf Differential output rise time and fall time RL = 54 Ω, CL = 50 pF, VCC2= 4.5 V to 5.5 V, see Figure 37 4.7 6 ns
RL = 54 Ω, CL = 50 pF, VCC2= 3 V to 3.6 V, see Figure 37 7.8 ns
tPHL, tPLH Propagation delay RL = 54 Ω, CL = 50 pF, see Figure 37 19 41 ns
PWD Pulse width distortion(1), |tPHL – tPLH| RL = 54 Ω, CL = 50 pF, see Figure 37 1 6 ns
tPHZ, tPLZ Disable time See Figure 40, and Figure 41 25 46 ns
tPZH, tPZL Enable time See Figure 40, and Figure 41 32 78 ns
(1) Also known as pulse skew.