ZHCSB29I September 2009 – October 2019 DS90UR905Q-Q1 , DS90UR906Q-Q1
PRODUCTION DATA.
PARAMETERS | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
tLHT | Serializer output low-to-high transition time, Figure 3 | RL = 100 Ω, De-emphasis = disabled, VODSEL = 0 | 200 | ps | ||
RL = 100 Ω, De-emphasis = disabled, VODSEL = 1 | 200 | ps | ||||
tHLT | Serializer output high-to-low transition time, Figure 3 | RL = 100 Ω, De-emphasis = disabled, VODSEL = 0 | 200 | ps | ||
RL = 100 Ω, De-emphasis = disabled, VODSEL = 1 | 200 | ps | ||||
tDIS | Input data – set-up time,
Figure 4 |
RGB[7:0], HS, VS, DE to PCLK | 2 | ns | ||
tDIH | Input data – hold time,
Figure 4 |
PCLK to RGB[7:0], HS, VS, DE | 2 | ns | ||
tXZD | Serializer output active to OFF delay, Figure 6(3) | 8 | 15 | ns | ||
tPLD(1) | Serializer PLL lock time,
Figure 5(3)(1) |
RL = 100 Ω | 1.4 | 10 | ms | |
tSD | Serializer delay – latency, Figure 7(3) | RL = 100 Ω | 144 × T | 145 × T | ns | |
tDJIT | Serializer output total jitter,
Figure 8 |
RL = 100 Ω, De-Emph = disabled,
RANDOM pattern, PCLK = 65 MHz |
0.28 | UI(2) | ||
RL = 100 Ω, De-Emph = disabled,
RANDOM pattern, PCLK = 43 MHz |
0.27 | UI | ||||
RL = 100 Ω, De-Emph = disabled,
RANDOM pattern, PCLK = 5 MHz |
0.35 | UI | ||||
λSTXBW | Serializer jitter transfer
Function –3-dB bandwidth |
PCLK = 65 MHz | 3 | MHz | ||
PCLK = 43 MHz | 2.3 | MHz | ||||
PCLK = 20 MHz | 1.3 | MHz | ||||
PCLK = 5 MHz | 650 | kHz | ||||
δSTX | Serializer jitter transfer
function peaking |
PCLK = 65 MHz | 0.838 | dB | ||
PCLK = 43 MHz | 0.825 | dB | ||||
PCLK = 20 MHz | 0.826 | dB | ||||
PCLK = 5 MHz | 0.278 | dB |