ZHCSDE3G February 2015 – October 2022 DP83867CR , DP83867IR
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
BIT | BIT NAME | DEFAULT | DESCRIPTION |
---|---|---|---|
15:5 | RESERVED | 0, RO | RESERVED |
4 | RGMII_AF_BYPASS_EN | 0, RW | RGMII Async FIFO Bypass Enable: |
1 = Enable RGMII Async FIFO Bypass. | |||
0 = Normal operation. | |||
3:0 | RESERVED | 0, RO | RESERVED |