SLUSE14B December   2020  – December 2021 BQ76942

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information BQ76942
    5. 7.5  Supply Current
    6. 7.6  Digital I/O
    7. 7.7  LD Pin
    8. 7.8  Precharge (PCHG) and Predischarge (PDSG) FET Drive
    9. 7.9  FUSE Pin Functionality
    10. 7.10 REG18 LDO
    11. 7.11 REG0 Pre-regulator
    12. 7.12 REG1 LDO
    13. 7.13 REG2 LDO
    14. 7.14 Voltage References
    15. 7.15 Coulomb Counter
    16. 7.16 Coulomb Counter Digital Filter (CC1)
    17. 7.17 Current Measurement Digital Filter (CC2)
    18. 7.18 Current Wake Detector
    19. 7.19 Analog-to-Digital Converter
    20. 7.20 Cell Balancing
    21. 7.21 Cell Open Wire Detector
    22. 7.22 Internal Temperature Sensor
    23. 7.23 Thermistor Measurement
    24. 7.24 Internal Oscillators
    25. 7.25 High-Side NFET Drivers
    26. 7.26 Comparator-Based Protection Subsystem
    27. 7.27 Timing Requirements – I2C Interface, 100kHz Mode
    28. 7.28 Timing Requirements – I2C Interface, 400kHz Mode
    29. 7.29 Timing Requirements – HDQ Interface
    30. 7.30 Timing Requirements – SPI Interface
    31. 7.31 Interface Timing Diagrams
    32. 7.32 Typical Characteristics
  8. Device Description
    1. 8.1 Overview
    2. 8.2 BQ76942 Device Versions
    3. 8.3 Functional Block Diagram
    4. 8.4 Diagnostics
  9. Device Configuration
    1. 9.1 Commands and Subcommands
    2. 9.2 Configuration Using OTP or Registers
    3. 9.3 Device Security
    4. 9.4 Scratchpad Memory
  10. 10Measurement Subsystem
    1. 10.1  Voltage Measurement
      1. 10.1.1 Voltage Measurement Schedule
      2. 10.1.2 Usage of VC Pins for Cells Versus Interconnect
      3. 10.1.3 Cell 1 Voltage Validation During SLEEP Mode
    2. 10.2  General Purpose ADCIN Functionality
    3. 10.3  Coulomb Counter and Digital Filters
    4. 10.4  Synchronized Voltage and Current Measurement
    5. 10.5  Internal Temperature Measurement
    6. 10.6  Thermistor Temperature Measurement
    7. 10.7  Factory Trim of Voltage ADC
    8. 10.8  Voltage Calibration (ADC Measurements)
    9. 10.9  Voltage Calibration (COV and CUV Protections)
    10. 10.10 Current Calibration
    11. 10.11 Temperature Calibration
  11. 11Primary and Secondary Protection Subsystems
    1. 11.1 Protections Overview
    2. 11.2 Primary Protections
    3. 11.3 Secondary Protections
    4. 11.4 High-Side NFET Drivers
    5. 11.5 Protection FETs Configuration and Control
      1. 11.5.1 FET Configuration
      2. 11.5.2 PRECHARGE and PREDISCHARGE Modes
    6. 11.6 Load Detect Functionality
  12. 12Device Hardware Features
    1. 12.1  Voltage References
    2. 12.2  ADC Multiplexer
    3. 12.3  LDOs
      1. 12.3.1 Preregulator Control
      2. 12.3.2 REG1 and REG2 LDO Controls
    4. 12.4  Standalone Versus Host Interface
    5. 12.5  Multifunction Pin Controls
    6. 12.6  RST_SHUT Pin Operation
    7. 12.7  CFETOFF, DFETOFF, BOTHOFF Pin Functionality
    8. 12.8  ALERT Pin Operation
    9. 12.9  DDSG and DCHG Pin Operation
    10. 12.10 Fuse Drive
    11. 12.11 Cell Open Wire
    12. 12.12 Low Frequency Oscillator
    13. 12.13 High Frequency Oscillator
  13. 13Device Functional Modes
    1. 13.1 Overview
    2. 13.2 NORMAL Mode
    3. 13.3 SLEEP Mode
    4. 13.4 DEEPSLEEP Mode
    5. 13.5 SHUTDOWN Mode
    6. 13.6 CONFIG_UPDATE Mode
  14. 14Serial Communications Interface
    1. 14.1 Serial Communications Overview
    2. 14.2 I2C Communications Subsystem
    3. 14.3 SPI Communications Interface
      1. 14.3.1 SPI Protocol
    4. 14.4 HDQ Communications Interface
  15. 15Cell Balancing
    1. 15.1 Cell Balancing Overview
  16. 16Application and Implementation
    1. 16.1 Application Information
    2. 16.2 Typical Applications
      1. 16.2.1 Design Requirements (Example)
      2. 16.2.2 Detailed Design Procedure
      3. 16.2.3 Application Performance Plot
      4. 16.2.4 Calibration Process
      5. 16.2.5 Design Example
    3. 16.3 Random Cell Connection Support
    4. 16.4 Startup Timing
    5. 16.5 FET Driver Turn-Off
    6. 16.6 Unused Pins
  17. 17Power Supply Requirements
  18. 18Layout
    1. 18.1 Layout Guidelines
    2. 18.2 Layout Example
  19. 19Device and Documentation Support
    1. 19.1 Third-Party Products Disclaimer
    2. 19.2 Documentation Support
      1. 19.2.1 Receiving Notification of Documentation Updates
    3. 19.3 Support Resources
    4. 19.4 Trademarks
    5. 19.5 Electrostatic Discharge Caution
    6. 19.6 Glossary
  20. 20Mechanical, Packaging, Orderable Information

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机械数据 (封装 | 引脚)
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订购信息

Typical Characteristics

Figure 7-4 Cell Voltage Measurement Error at 25°C Across Input Range
Figure 7-6 Cell Voltage Measurement Error vs. Temperature with Cell Voltage = 2.5 V
Figure 7-8 Cell Voltage Measurement Error vs. Temperature with Cell Voltage = 4.5 V
Error in measurement of differential voltage between SRP and SRN pins.
Figure 7-10 Current Measurement Error vs. Temperature
Figure 7-12 Internal Temperature Sensor (Delta V‍‍BE) Voltage vs. Temperature
Figure 7-14 High Frequency Oscillator (HFO) Accuracy vs. Temperature
Figure 7-16 Overcurrent in Charge Protection (OCC) Threshold vs. Temperature
GUID-20201002-CA0I-WFSR-NT53-DTTHFNQWLFZJ-low.gif

This test uses a resistor divider across the VCx pins to enable one common voltage to be scaled across the cell inputs. The top of the string is swept and captured as the cell voltage.

Figure 7-18 Cell Balancing Resistance vs. Cell Common-Mode Voltage at 25°C
GUID-20200920-CA0I-GL5W-QMPP-MLBMCR7GJTBS-low.gifFigure 7-20 REG2 Voltage vs. Load at 25°C
Figure 7-22 Thermistor Pullup Resistance vs. Temperature (180-kΩ Setting)
Figure 7-24 LD Wake Voltage vs. Temperature
Figure 7-26 REG18 Voltage vs. Temperature, across BAT Levels
Figure 7-28 BAT Current in NORMAL Mode vs. Temperature
Figure 7-30 BAT Current in SLEEP2 (SRC Follower) Mode vs. Temperature
Figure 7-5 Cell Voltage Measurement Error vs. Temperature with Cell Voltage = 1.5 V
GUID-20201002-CA0I-NTCN-5JCG-LG0NLHVPKVNX-low.gifFigure 7-7 Cell Voltage Measurement Error vs. Temperature with Cell Voltage = 3.5 V
Figure 7-9 Cell Voltage Measurement Error vs. Temperature with Cell Voltage = 5.5 V
GUID-20200920-CA0I-HMVR-DH93-65JGL8BPNPMQ-low.gifFigure 7-11 Internal Voltage References vs. Temperature (VREF1 and VREF2)
LFO measured in full speed mode (262 kHz)
Figure 7-13 Low Frequency Oscillator (LFO) Accuracy vs. Temperature
GUID-20200920-CA0I-GXTL-HTZF-TXGPN2D0PMZP-low.gifFigure 7-15 Overcurrent in Discharge Protection 1 (OCD1) Threshold vs. Temperature
Figure 7-17 Cell Balancing Resistance vs. Temperature
Figure 7-19 REG1 Voltage vs. Load at 25°C
Figure 7-21 Thermistor Pullup Resistance vs. Temperature (18-kΩ Setting)
Error calculated as percentage of nominal gain across ±200-mV input range
Figure 7-23 Coulomb Counter Gain Error vs. Temperature
GUID-20200920-CA0I-R1PB-57VQ-FF1WTHL1QFCH-low.gifFigure 7-25 REG18 Voltage vs. Temperature, with No Load
Measurements taken using external BJT
Figure 7-27 REGIN Voltage vs. BAT Voltage
GUID-20200920-CA0I-TQWR-DPLM-HNVRPRZB5JWQ-low.gifFigure 7-29 BAT Current in SHUTDOWN Mode vs. Temperature
Figure 7-31 BAT Current in DEEPSLEEP2 (No LFO) Mode vs. Temperature