ZHCSH46A December   2017  – June 2018

PRODUCTION DATA.

1. 特性
2. 应用
3. 说明
1.     Device Images
4. 修订历史记录
5. 器件比较表
6. Pin Configuration and Functions
7. Specifications
8. Detailed Description
9. Application and Implementation
1. 9.1 Application Information
2. 9.2 Typical Application
3. 9.3 Do's and Don'ts
10. 10Power Supply Recommendations
11. 11Layout
12. 12器件和文档支持
1. 12.1 文档支持
2. 12.2 接收文档更新通知
3. 12.3 社区资源
4. 12.4 商标
5. 12.5 静电放电警告
6. 12.6 术语表
13. 13机械、封装和可订购信息

• DWV|8

#### 9.2.2 Detailed Design Procedure

Use Ohm's Law to calculate the minimum total resistance of the resistive divider to limit the cross current to the desired value (RTOTAL = VBUS / ICROSS) and the required sense resistor value to be connected to the AMC1311 input: RSENSE = VFSR / ICROSS.

Consider the following two restrictions to choose the proper value of the shunt resistor RSENSE:

• The voltage drop on RSENSE caused by the nominal voltage range of the system must not exceed the recommended input voltage range: VSENSE ≤ VFSR
• The voltage drop on RSENSE caused by the maximum allowed system overvoltage must not exceed the input voltage that causes a clipping output: VSENSE ≤ VClipping

Table 2 lists examples of nominal E96-series (1% accuracy) resistor values for systems using 600 V and 800 V on the dc bus.

### Table 2. Resistor Value Examples

PARAMETER 600-V DC BUS 800-V DC Bus
Resistive divider resistor R1 3.01 MΩ 4.22 MΩ
Resistive divider resistor R2 3.01 MΩ 4.22 MΩ
Sense resistor RSENSE 20 kΩ 21 kΩ
Resulting current through resistive divider ICROSS 99.3 µA 94.5 µA
Resulting voltage drop on sense resistor VSENSE 1.987 V 1.986 V

For systems using single-ended input ADCs, Figure 50 shows an example of a TLV6001-based signal conversion and filter circuit as used on the AMC1311EVM. Tailor the bandwidth of this filter stage to the bandwidth requirement of the system and use NP0-type capacitors for best performance.

For more information on the general procedure to design the filtering and driving stages of SAR ADCs, see 18-Bit, 1MSPS Data Acquisition Block (DAQ) Optimized for Lowest Distortion and Noise and 18-Bit Data Acquisition Block (DAQ) Optimized for Lowest Power, available for download at www.ti.com.