ZHCSHT4B October   2018  – June 2022 AMC1302-Q1

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Timing Diagram
    12. 6.12 Insulation Characteristics Curves
    13. 6.13 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Isolation Channel Signal Transmission
      3. 7.3.3 Analog Output
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Shunt Resistor Sizing
        2. 8.2.2.2 Input Filter Design
        3. 8.2.2.3 Differential to Single-Ended Output Conversion
      3. 8.2.3 Application Curve
    3. 8.3 What to Do and What Not to Do
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Typical Characteristics

at TA = 25°C, VDD1 = 5 V, VDD2 = 3.3 V, INP = –50 mV to 50 mV, INN = GND1, and fIN = 10 kHz (unless otherwise noted)

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Figure 6-5 Common-Mode Overvoltage Detection Level vs High-Side Supply Voltage
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Figure 6-7 Input Offset Voltage vs Supply Voltage
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Figure 6-9 Common-Mode Rejection Ratio vs Input Frequency
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Figure 6-11 Input Bias Current vs Common-Mode Input Voltage
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Figure 6-13 Input Bias Current vs Temperature
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Figure 6-15 Gain Error vs Temperature
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Figure 6-17 Output Phase vs Input Frequency
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Figure 6-19 Nonlinearity vs Input Voltage
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Figure 6-21 Nonlinearity vs Temperature
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Figure 6-23 Total Harmonic Distortion vs Temperature
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Figure 6-25 Signal-to-Noise Ratio vs Input Voltage
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Figure 6-27 Signal-to-Noise Ratio vs Temperature
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Figure 6-29 Output Common-Mode Voltage vs Low-Side Supply Voltage
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Figure 6-31 Output Bandwidth vs Low-Side Supply Voltage
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Figure 6-33 Supply Current vs Supply Voltage
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Figure 6-35 Output Rise and Fall Time vs Low-Side Supply Voltage
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Figure 6-37 VIN to VOUT Signal Delay vs Low-Side Supply Voltage
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Figure 6-6 Common-Mode Overvoltage Detection Level vs Temperature
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Figure 6-8 Input Offset Voltage vs Temperature
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Figure 6-10 Common-Mode Rejection Ratio vs Temperature
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Figure 6-12 Input Bias Current vs High-Side Supply Voltage
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Figure 6-14 Gain Error vs Supply Voltage
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Figure 6-16 Normalized Gain vs Input Frequency
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Figure 6-18 Output Voltage vs Input Voltage
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Figure 6-20 Nonlinearity vs Supply Voltage
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Figure 6-22 Total Harmonic Distortion vs Supply Voltage
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Figure 6-24 Output Noise Density vs Frequency
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Figure 6-26 Signal-to-Noise Ratio vs Supply Voltage
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Figure 6-28 Power-Supply Rejection Ratio vs Ripple Frequency
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Figure 6-30 Output Common-Mode Voltage vs Temperature
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Figure 6-32 Output Bandwidth vs Temperature
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Figure 6-34 Supply Current vs Temperature
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Figure 6-36 Output Rise and Fall Time vs Temperature
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Figure 6-38 VIN to VOUT Signal Delay vs Temperature