ZHCSJP5B May   2019  – October 2021 ALM2402F-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: VS = 12 V
    6. 6.6 Electrical Characteristics: VS = 5 V
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 OTF/SH_DN
      2. 7.3.2 Output Stage Supply Voltage
      3. 7.3.3 Current-Limit and Short-Circuit Protection
      4. 7.3.4 Input Common-Mode Overvoltage Clamps
      5. 7.3.5 Thermal Shutdown
      6. 7.3.6 Output Stage
      7. 7.3.7 EMI Susceptibility and Input Filtering
    4. 7.4 Device Functional Modes
      1. 7.4.1 Open-Loop and Closed-Loop Operation
      2. 7.4.2 Shutdown
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Capacitive Load and Stability
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Resolver Excitation Input (Op Amp Output)
          1. 8.2.2.1.1 Excitation Voltage
          2. 8.2.2.1.2 Excitation Frequency
          3. 8.2.2.1.3 Excitation Impedance
        2. 8.2.2.2 Resolver Output
        3. 8.2.2.3 Power Dissipation and Thermal Reliability
          1. 8.2.2.3.1 Improving Package Thermal Performance
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

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7.3.3 Current-Limit and Short-Circuit Protection

Each op amp in the ALM2402F-Q1 has separate internal current limiting for the PMOS (high-side) and NMOS (low-side) output transistors. If the output is shorted to ground then the PMOS (high-side) current limit is activated, and limits the current to 750 mA nominally. If the output is shorted to supply then the NMOS (low-side) current limit is activated and limits the current to 550 mA nominally at 25°C. The current limit value decreases with increasing temperature as a result of the temperature coefficient of a base-emitter junction voltage. Similarly, the current limit value increases at low temperatures.

In the case of short-to-ground scenarios, a programmable current limit for the PMOS (high-side) is achieved by adding resistance between VS_O(x), where x = 1 or 2, and the supply VS. The added current limit resistor reduces the drain-source voltage across the PMOS output transistor, thus reducing the output current drive capability. For a desired current limit (ILIMIT), an appropriate current limiting resistor (Rlimit) is selected using Equation 1.

Equation 1. GUID-49491224-D9F8-4500-BD9E-6DE621DE128D-low.gif

When current is limited, the safe limits for the die temperature must be taken in to account; see the Recommended Operating Conditions and Absolute Maximum Ratings tables. With too much power dissipation, the die temperature can surpass thermal shutdown limits; the op amp shuts down and reactivates after the die has fallen below thermal limits. However, do not continuously operate the device in thermal hysteresis for long periods of time (see the Absolute Maximum Ratings table).