ZHCSEU3E
July 2014 – June 2022
ADC3221
,
ADC3222
,
ADC3223
,
ADC3224
PRODUCTION DATA
1
特性
2
应用
3
说明
4
Revision History
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions (1)
6.4
Thermal Information
6.5
Electrical Characteristics: General
6.6
Electrical Characteristics: ADC3221, ADC3222
6.7
Electrical Characteristics: ADC3223, ADC3224
6.8
AC Performance: ADC3221
6.9
AC Performance: ADC3222
6.10
AC Performance: ADC3223
6.11
AC Performance: ADC3224
6.12
Digital Characteristics
6.13
Timing Requirements: General
6.14
Timing Requirements: LVDS Output
6.15
Typical Characteristics: ADC3221
6.16
Typical Characteristics: ADC3222
6.17
Typical Characteristics: ADC3223
6.18
Typical Characteristics: ADC3224
6.19
Typical Characteristics: Common
6.20
Typical Characteristics: Contour
7
Parameter Measurement Information
7.1
Timing Diagrams
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Analog Inputs
8.3.2
Clock Input
8.3.2.1
Using the SYSREF Input
8.3.2.2
SNR and Clock Jitter
8.3.3
Digital Output Interface
8.3.3.1
One-Wire Interface: 12X Serialization
8.3.3.2
Two-Wire Interface: 6X Serialization
8.4
Device Functional Modes
8.4.1
Input Clock Divider
8.4.2
Chopper Functionality
8.4.3
Power-Down Control
8.4.3.1
Improving Wake-Up Time From Global Power-Down
8.4.4
Internal Dither Algorithm
8.5
Programming
8.5.1
Serial Interface
8.5.1.1
Register Initialization
8.5.1.1.1
Serial Register Write
8.5.1.1.2
Serial Register Readout
8.5.2
Register Initialization through SPI
8.6
Register Maps
8.6.1
Summary of Special Mode Registers
8.6.2
Serial Register Description
8.6.2.1
Register 01h
8.6.2.2
Register 03h
8.6.2.3
Register 04h
8.6.2.4
Register 05h
8.6.2.5
Register 06h
8.6.2.6
Register 07h
8.6.2.7
Register 09h
8.6.2.8
Register 0Ah
8.6.2.9
Register 0Bh
8.6.2.10
Register 0Eh
8.6.2.11
Register 0Fh
8.6.2.12
Register 13h
8.6.2.13
Register 15h
8.6.2.14
Register 25h
8.6.2.15
Register 27h
8.6.2.16
Register 41Dh
8.6.2.17
Register 422h
8.6.2.18
Register 434h
8.6.2.19
Register 439h
8.6.2.20
Register 51Dh
8.6.2.21
Register 522h
8.6.2.22
Register 534h
8.6.2.23
Register 539h
8.6.2.24
Register 608h
8.6.2.25
Register 70Ah
9
Applications and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Driving Circuit Design: Low Input Frequencies
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curve
9.2.2
Driving Circuit Design: Input Frequencies Between 100 MHz to 230 MHz
9.2.2.1
Design Requirements
9.2.2.2
Detailed Design Procedure
9.2.2.3
Application Curve
9.2.3
Driving Circuit Design: Input Frequencies Greater than 230 MHz
9.2.3.1
Design Requirements
9.2.3.2
Detailed Design Procedure
9.2.3.3
Application Curve
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
接收文档更新通知
10.2
支持资源
10.3
Trademarks
10.4
Electrostatic Discharge Caution
10.5
术语表
11
Mechanical, Packaging, and Orderable Information
封装选项
机械数据 (封装 | 引脚)
RGZ|48
MPQF123F
散热焊盘机械数据 (封装 | 引脚)
RGZ|48
QFND131R
订购信息
zhcseu3e_oa
zhcseu3e_pm
9.2.2
Driving Circuit Design: Input Frequencies Between 100 MHz to 230 MHz
Figure 9-5
Driving Circuit for Mid-Range Input Frequencies (100 MHz < f
IN
< 230 MHz)