ZHCSEU3E July 2014 – June 2022 ADC3221 , ADC3222 , ADC3223 , ADC3224
PRODUCTION DATA
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | CHA PDN | CHB PDN | 0 | STANDBY | GLOBAL PDN | 0 | CONFIG PDN PIN |
W-0h | R/W-0h | R/W-0h | W-0h | R/W-0h | R/W-0h | W-0h | R/W-0h |
LEGEND: R/W = Read/Write; R = Read only; W = Write only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | 0 | W | 0h | Must write 0 |
6 | CHA PDN | R/W | 0h | 0 = Normal operation 1 = Power-down channel A |
5 | CHB PDN | R/W | 0h | 0 = Normal operation 1 = Power-down channel B |
4 | 0 | W | 0h | Must write 0 |
3 | STANDBY | R/W | 0h | The ADCs of both channels enter standby. 0 = Normal operation 1 = Standby |
2 | GLOBAL PDN | R/W | 0h | 0 = Normal operation 1 = Global power-down |
1 | 0 | W | 0h | Must write 0 |
0 | CONFIG PDN PIN | R/W | 0h | This bit configures the PDN pin as either a global power-down or standby pin. 0 = Logic high voltage on the PDN pin sends the device into global power-down 1 = Logic high voltage on the PDN pin sends the device into standby |