SBOS671B September   2018  – December 2018 OPA828

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Open-Loop Gain and Phase vs Frequency
      2.      Offset Voltage Drift
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Operating Characteristics
      2. 7.3.2  Phase-Reversal Protection
      3. 7.3.3  Electrical Overstress
      4. 7.3.4  MUX Friendly Inputs
      5. 7.3.5  Overload Power Limiter
      6. 7.3.6  Capacitive Load and Stability
      7. 7.3.7  Capacitive Load and Stability
      8. 7.3.8  Settling Time
      9. 7.3.9  Slew Rate
      10. 7.3.10 Full Power Bandwidth
      11. 7.3.11 Small Signal Response
      12. 7.3.12 Thermal Considerations
      13. 7.3.13 Thermal Shutdown
      14. 7.3.14 Low Noise
      15. 7.3.15 Low Offset Voltage Drift
      16. 7.3.16 Overload Recovery
    4. 7.4 Device Functional Modes
      1. 7.4.1 Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Application: SAR ADC Driver
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical Application: Low-Pass Filter
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resource
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Low Input Voltage Noise Density:
    4 nV/√Hz at 1 kHz
  • Input Voltage Noise:
    0.1 Hz to 10 Hz: 60 nVRMS
  • Low Input Bias Current: 1 pA
  • Input Offset Voltage: 50 μV
  • Input Offset Drift: 0.45 μV/°C
  • MUX-Friendly Inputs
  • Gain Bandwidth: 45 MHz
  • Slew Rate: 150 V/μs
  • 14-bit Settling Time: 120 ns
  • Overload Power Limiter
  • Wide Supply Voltage Range: ±4 V to ±18 V
  • Package: 8-pin SOIC