SLVSE65B July   2018  – September 2019 DRV8847

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Simplified Schematic
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM Motor Drivers
      2. 7.3.2 Bridge Operation
        1. 7.3.2.1 Forward Operation
        2. 7.3.2.2 Reverse Operation
        3. 7.3.2.3 Coast Operation (Fast Decay)
        4. 7.3.2.4 Brake Operation (Slow Decay)
      3. 7.3.3 Bridge Control
        1. 7.3.3.1 4-Pin Interface
        2. 7.3.3.2 2-Pin Interface
        3. 7.3.3.3 Parallel Bridge Interface
        4. 7.3.3.4 Independent Bridge Interface
      4. 7.3.4 Current Regulation
      5. 7.3.5 Current Recirculation and Decay Modes
      6. 7.3.6 Torque Scalar
      7. 7.3.7 Stepping Modes
        1. 7.3.7.1 Full-Stepping Mode (4-Pin Interface)
        2. 7.3.7.2 Full-Stepping Mode (2-Pin Interface)
        3. 7.3.7.3 Half-Stepping Mode (With Non-Driving Fast Decay)
        4. 7.3.7.4 Half-Stepping Mode (With Non-Driving Slow Decay)
      8. 7.3.8 Motor Driver Protection Circuits
        1. 7.3.8.1 Overcurrent Protection (OCP)
          1. 7.3.8.1.1 OCP Automatic Retry (Hardware Device and Software Device (OCPR = 0b))
          2. 7.3.8.1.2 OCP Latch Mode (Software Device (OCPR = 1b))
        2. 7.3.8.2 Thermal Shutdown (TSD)
        3. 7.3.8.3 VM Undervoltage Lockout (VM_UVLO)
        4. 7.3.8.4 Open Load Detection (OLD)
          1. 7.3.8.4.1 Full-Bridge Open Load Detection
          2. 7.3.8.4.2 Load Connected to VM
          3. 7.3.8.4.3 Load Connected to GND
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 I2C Communication
        1. 7.5.1.1 I2C Write
        2. 7.5.1.2 I2C Read
      2. 7.5.2 Multi-Slave Operation
    6. 7.6 Register Map
      1. 7.6.1 Slave Address Register (Address = 0x00) [reset = 0x60]
        1. Table 17. Slave Address Register Field Descriptions
      2. 7.6.2 IC1 Control Register (Address = 0x01) [reset = 0x00]
        1. Table 18. IC1 Control Register Field Descriptions
      3. 7.6.3 IC2 Control Register (Address = 0x02) [reset = 0x00]
        1. Table 19. IC2 Control Register Field Descriptions
      4. 7.6.4 Slew-Rate and Fault Status-1 Register (Address = 0x03) [reset = 0x40]
        1. Table 20. Fault Status-1 Register Field Descriptions
      5. 7.6.5 Fault Status-2 Register (Address = 0x04) [reset = 0x00]
        1. Table 21. Fault Status-2 Register Field Descriptions
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Stepper Motor Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Current Regulation
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Dual BDC Motor Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Motor Voltage
          2. 8.2.2.2.2 Current Regulation
          3. 8.2.2.2.3 Sense Resistor
      3. 8.2.3 Open Load Implementation
        1. 8.2.3.1 Open Load Detection Circuit
        2. 8.2.3.2 OLD for Ground Connected Load
          1. 8.2.3.2.1 Half Bridge Open
          2. 8.2.3.2.2 Half Bridge Short
          3. 8.2.3.2.3 Load Connected
        3. 8.2.3.3 OLD for Supply (VM) Connected Load
          1. 8.2.3.3.1 Half Bridge Open
          2. 8.2.3.3.2 Half Bridge Short
          3. 8.2.3.3.3 Load Connected
        4. 8.2.3.4 OLD for Full Bridge Connected Load
          1. 8.2.3.4.1 Full Bridge Open
            1. 8.2.3.4.1.1 High side comparator of half-bridge-1 (OL1_HS)
            2. 8.2.3.4.1.2 Low side comparator of half-bridge-2 (OL2_LS)
          2. 8.2.3.4.2 Full Bridge Short
            1. 8.2.3.4.2.1 High side comparator of half-bridge-1 (OL1_HS)
            2. 8.2.3.4.2.2 Low side comparator of half-bridge-2 (OL2_LS)
          3. 8.2.3.4.3 Load Connected in Full Bridge
            1. 8.2.3.4.3.1 High side comparator of half-bridge-1 (OL1_HS)
            2. 8.2.3.4.3.2 Low side comparator of half-bridge-2 (OL2_LS)
  9. Power Supply Recommendations
    1. 9.1 Bulk Capacitance Sizing
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
      1. 10.3.1 Maximum Output Current
      2. 10.3.2 Thermal Protection
    4. 10.4 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PW|16
  • PWP|16
  • RTE|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Dual H-bridge motor driver
    • Single or dual brushed DC motors
    • One bipolar stepper motor
    • Solenoid loads
  • 2.7-V to 18-V operating voltage range
  • High output current per H-bridge
    • 1-A RMS driver current at TA = 25°C
    • 2-A RMS driver current in parallel mode at TA = 25°C
  • Low on-state resistance at VM > 5-V
    • 1000 mΩ RDS(ON) (HS + LS) at TA = 25°C
  • Multiple control interface options
    • 4-Pin interface
    • 2-Pin interface
    • Parallel bridge interface
    • Independent bridge interface
  • Current regulation with 20-μs fixed off time
  • Torque scalar for scaling output current to 50%
  • Supports 1.8-V, 3.3-V, 5-V logic inputs
  • Low-power sleep mode
    • 1.7-µA Sleep mode supply current at VVM = 12-V, TA = 25°C
  • I2C Device Variant Available (DRV8847S)
    • Detailed diagnostics on I2C registers
    • Multi-slave operation support
    • Supports standard and fast I2C mode
  • Small packages and footprints
    • 16 Pin TSSOP (no thermal pad)
    • 16 Pin HTSSOP PowerPAD™ package
    • 16 Pin WQFN thermal package
  • Built-in protection features
    • VM undervoltage lockout
    • Overcurrent protection
    • Open load detection
    • Thermal shutdown
    • Fault condition indication pin (nFAULT)