SLUSCJ4A June   2017  – August 2017

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Power-On-Reset (POR)
      2. 8.3.2  Device Power Up from Battery without Input Source
      3. 8.3.3  Power Up from Input Source
        1. 8.3.3.1 Power Up REGN Regulation
        2. 8.3.3.2 Poor Source Qualification
        3. 8.3.3.3 Input Source Type Detection
          1. 8.3.3.3.1 D+/D- Detection Sets Input Current Limit in bq25600D
          2. 8.3.3.3.2 PSEL Pins Sets Input Current Limit in bq25600
        4. 8.3.3.4 Input Voltage Limit Threshold Setting (VINDPM Threshold)
        5. 8.3.3.5 Converter Power-Up
      4. 8.3.4  Boost Mode Operation From Battery
      5. 8.3.5  Host Mode and Standalone Power Management
        1. 8.3.5.1 Host Mode and Default Mode in bq25600 and bq25600D
      6. 8.3.6  Power Path Management
      7. 8.3.7  Battery Charging Management
        1. 8.3.7.1  Autonomous Charging Cycle
        2. 8.3.7.2  Battery Charging Profile
        3. 8.3.7.3  Charging Termination
        4. 8.3.7.4  Thermistor Qualification
        5. 8.3.7.5  JEITA Guideline Compliance During Charging Mode
        6. 8.3.7.6  Boost Mode Thermistor Monitor during Battery Discharge Mode
        7. 8.3.7.7  Charging Safety Timer
        8. 8.3.7.8  Narrow VDC Architecture
        9. 8.3.7.9  Dynamic Power management
        10. 8.3.7.10 Supplement Mode
      8. 8.3.8  Shipping Mode and QON Pin
        1. 8.3.8.1 BATFET Disable Mode (Shipping Mode)
        2. 8.3.8.2 BATFET Enable (Exit Shipping Mode)
        3. 8.3.8.3 BATFET Full System Reset
        4. 8.3.8.4 QON Pin Operations
      9. 8.3.9  Status Outputs (PG, STAT, INT)
        1. 8.3.9.1 Power Good indicator (PG Pin and PG_STAT Bit)
        2. 8.3.9.2 Charging Status indicator (STAT)
        3. 8.3.9.3 Interrupt to Host (INT)
      10. 8.3.10 Protections
        1. 8.3.10.1 Voltage and Current Monitoring in Converter Operation
          1. 8.3.10.1.1 Voltage and Current Monitoring in Buck Mode
            1. 8.3.10.1.1.1 Input Overvoltage (ACOV)
            2. 8.3.10.1.1.2 System Overvoltage Protection (SYSOVP)
        2. 8.3.10.2 Voltage and Current Monitoring in Boost Mode
          1. 8.3.10.2.1 VBUS Soft Start
          2. 8.3.10.2.2 VBUS Output Protection
          3. 8.3.10.2.3 Boost Mode Overvoltage Protection
        3. 8.3.10.3 Thermal Regulation and Thermal Shutdown
          1. 8.3.10.3.1 Thermal Protection in Buck Mode
          2. 8.3.10.3.2 Thermal Protection in Boost Mode
        4. 8.3.10.4 Battery Protection
          1. 8.3.10.4.1 Battery overvoltage Protection (BATOVP)
          2. 8.3.10.4.2 Battery Over-Discharge Protection
          3. 8.3.10.4.3 System Over-Current Protection
      11. 8.3.11 Serial interface
        1. 8.3.11.1 Data Validity
        2. 8.3.11.2 START and STOP Conditions
        3. 8.3.11.3 Byte Format
        4. 8.3.11.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 8.3.11.5 Slave Address and Data Direction Bit
        6. 8.3.11.6 Single Read and Write
        7. 8.3.11.7 Multi-Read and Multi-Write
    4. 8.4 Register Maps
      1. 8.4.1  REG00
      2. 8.4.2  REG01
      3. 8.4.3  REG02
      4. 8.4.4  REG03
      5. 8.4.5  REG04
      6. 8.4.6  REG05
      7. 8.4.7  REG06
      8. 8.4.8  REG07
      9. 8.4.9  REG08
      10. 8.4.10 REG09
      11. 8.4.11 REG0A
      12. 8.4.12 REG0B
  9. Application and Implementation
    1. 9.1 Application information
    2. 9.2 Typical Application Diagram
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 inductor Selection
        3. 9.2.2.3 input Capacitor
        4. 9.2.2.4 Output Capacitor
    3. 9.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support (Optional)
      1. 12.1.1 Development Support
        1. 12.1.1.1 Custom Design With WEBENCH® Tools
    2. 12.2 Documentation Support
      1. 12.2.1 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • High-Efficiency, 1.5-MHz, Synchronous Switch-Mode Buck Charger
    • 92% Charge Efficiency at 2 A from 5-V Input
    • Optimized for USB Voltage Input (5 V)
    • Selectable Low Power Pulse Frequency Modulation (PFM) Mode for Light Load Operations
  • Supports USB On-The-Go (OTG)
    • Boost Converter With Up to 1.2-A Output
    • 92% Boost Efficiency at 1-A Output
    • Accurate Constant Current (CC) Limit
    • Soft-Start Up To 500-µF Capacitive Load
    • Output Short Circuit Protection
    • Selectable Low Power PFM Mode for Light Load Operations
  • Single Input to Support USB Input and High Voltage Adapters
    • Support 3.9-V to 13.5-V Input Voltage Range With 22-V Absolute Maximum Input Voltage Rating
    • Programmable Input Current Limit (100 mA to 3.2 A With 100-mA Resolution) to Support USB 2.0, USB 3.0 Standards and High Voltage Adaptors (IINDPM)
    • Maximum Power Tracking by Input Voltage Limit Up to 5.4 V (VINDPM)
    • VINDPM Threshold Automatically Tracks Battery Voltage
    • Auto Detect USB SDP, DCP and Non-Standard Adaptors
  • High Battery Discharge Efficiency With 19.5-mΩ Battery Discharge MOSFET
  • Narrow VDC (NVDC) Power Path Management
    • Instant-On Works with No Battery or Deeply Discharged Battery
    • Ideal Diode Operation in Battery Supplement Mode
  • BATFET Control to Support Ship Mode, Wake Up and Full System Reset
  • Flexible Autonomous and I2C Mode for Optimal System Performance
  • High Integration Includes All MOSFETs, Current Sensing and Loop Compensation
  • 17-µA Low Battery Leakage Current
  • High Accuracy
    • ±0.5% Charge Voltage Regulation
    • ±6% at 1.38-A Charge Current Regulation
    • ±10% at 0.9-A Input Current Regulation
    • Remote Battery Sensing for Fast Charge
  • Create a Custom Design Using the bq25600 and bq25600D With the WEBENCH® Power Designer

Applications

  • Smart Phones
  • Portable Internet Devices and Accessory

Description

The bq25600 and bq25600D device are a highly-integrated 3.0-A switch-mode battery charge management and system power path management device for single cell Li-Ion and Li-polymer battery. The low impedance power path optimizes switch-mode operation efficiency, reduces battery charging time and extends battery life during discharging phase. The I2C serial interface with charging and system settings makes the device a truly flexible solution.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
bq25600 WCSP (30) 2.00 mm × 2.40 mm
bq25600D
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Application

bq25600 bq25600D simp_app_slusck5.gif