# 15 Sep 2022 01:14 PM
#
CNSA_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 100-OHM-SP:N:PWR-SP
    layers = top
    bb_via2bb_via = 0.006750
    bb_via2line = 0.004000
    bb_via2smd_pin = 0.005000
    bb_via2shape = 0.004500
    bb_via2tst_pin = 0.005000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.005000
    bb_via2thru_via = 0.010000
    line2line = 0.004000
    line2smd_pin = 0.003750
    line2shape = 0.005000
    line2tst_pin = 0.003750
    line2tst_via = 0.004000
    line2thru_pin = 0.003750
    line2thru_via = 0.004000
    shape2smd_pin = 0.004000
    shape2shape = 0.008000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.004500
    shape2thru_pin = 0.004000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.004750
    smd_pin2tst_pin = 0.004750
    smd_pin2tst_via = 0.005000
    smd_pin2thru_pin = 0.004750
    smd_pin2thru_via = 0.004000
    tst_pin2tst_pin = 0.004750
    tst_pin2tst_via = 0.005000
    tst_pin2thru_pin = 0.004750
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.005000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.004750
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.006800
    thru_pin2bond_pad = 0.005000
    smd_pin2bond_pad = 0.005000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.004000
    bond_pad2shape = 0.004500
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.005000
    tst_via2bond_pad = 0.010000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 100-OHM-SP:N:PWR-SP
    layers = top
    main_set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 100-OHM-SP:N:PWR-SP
    layers = l2-gnd1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 100-OHM-SP:N:PWR-SP
    layers = l3-signal1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 100-OHM-SP:N:PWR-SP
    layers = l4-gnd2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 100-OHM-SP:N:PWR-SP
    layers = l5-signal2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 100-OHM-SP:N:PWR-SP
    layers = l6-pwr1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 100-OHM-SP:N:PWR-SP
    layers = l7-pwr2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 100-OHM-SP:N:PWR-SP
    layers = l8-signal3
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 100-OHM-SP:N:PWR-SP
    layers = l9-gnd3
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 100-OHM-SP:N:PWR-SP
    layers = l10-signal4
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 100-OHM-SP:N:PWR-SP
    layers = l11-gnd4
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 100-OHM-SP:N:PWR-SP
    layers = bottom
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 90-OHM-SP:N:PWR-SP
    layers = top
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 90-OHM-SP:N:PWR-SP
    layers = l2-gnd1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 90-OHM-SP:N:PWR-SP
    layers = l3-signal1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 90-OHM-SP:N:PWR-SP
    layers = l4-gnd2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 90-OHM-SP:N:PWR-SP
    layers = l5-signal2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 90-OHM-SP:N:PWR-SP
    layers = l6-pwr1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 90-OHM-SP:N:PWR-SP
    layers = l7-pwr2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 90-OHM-SP:N:PWR-SP
    layers = l8-signal3
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 90-OHM-SP:N:PWR-SP
    layers = l9-gnd3
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 90-OHM-SP:N:PWR-SP
    layers = l10-signal4
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 90-OHM-SP:N:PWR-SP
    layers = l11-gnd4
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N
    net_type2 = 90-OHM-SP:N:PWR-SP
    layers = bottom
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:100-OHM-SP
    net_type2 = *
    layers = top
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:100-OHM-SP
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:100-OHM-SP
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:100-OHM-SP
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:100-OHM-SP
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:100-OHM-SP
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:100-OHM-SP
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:100-OHM-SP
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:100-OHM-SP
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:100-OHM-SP
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:100-OHM-SP
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:100-OHM-SP
    net_type2 = *
    layers = bottom
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:85-OHM
    net_type2 = *
    layers = top
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:85-OHM
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:85-OHM
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:85-OHM
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:85-OHM
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:85-OHM
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:85-OHM
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:85-OHM
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:85-OHM
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:85-OHM
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:85-OHM
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:85-OHM
    net_type2 = *
    layers = bottom
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:90-OHM-SP
    net_type2 = *
    layers = top
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:90-OHM-SP
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:90-OHM-SP
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:90-OHM-SP
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:90-OHM-SP
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:90-OHM-SP
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:90-OHM-SP
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:90-OHM-SP
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:90-OHM-SP
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:90-OHM-SP
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:90-OHM-SP
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:90-OHM-SP
    net_type2 = *
    layers = bottom
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:PWR-SP
    net_type2 = *
    layers = top
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:PWR-SP
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:PWR-SP
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:PWR-SP
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:PWR-SP
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:PWR-SP
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:PWR-SP
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:PWR-SP
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:PWR-SP
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:PWR-SP
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:PWR-SP
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:PWR-SP
    net_type2 = *
    layers = bottom
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = PWR-SP:N:PWR-SP
    net_type2 = N
    layers = top
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = PWR-SP:N:PWR-SP
    net_type2 = N
    layers = l2-gnd1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = PWR-SP:N:PWR-SP
    net_type2 = N
    layers = l3-signal1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = PWR-SP:N:PWR-SP
    net_type2 = N
    layers = l4-gnd2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = PWR-SP:N:PWR-SP
    net_type2 = N
    layers = l5-signal2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = PWR-SP:N:PWR-SP
    net_type2 = N
    layers = l6-pwr1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = PWR-SP:N:PWR-SP
    net_type2 = N
    layers = l7-pwr2
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = PWR-SP:N:PWR-SP
    net_type2 = N
    layers = l8-signal3
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = PWR-SP:N:PWR-SP
    net_type2 = N
    layers = l9-gnd3
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = PWR-SP:N:PWR-SP
    net_type2 = N
    layers = l10-signal4
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = PWR-SP:N:PWR-SP
    net_type2 = N
    layers = l11-gnd4
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = PWR-SP:N:PWR-SP
    net_type2 = N
    layers = bottom
    set_name = CSET00001
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:33-OHM
    net_type2 = *
    layers = top
    bb_via2bb_via = 0.004000
    bb_via2line = 0.005000
    bb_via2smd_pin = 0.004000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.004000
    bb_via2tst_via = 0.004000
    bb_via2thru_pin = 0.004000
    bb_via2thru_via = 0.005000
    line2line = 0.004000
    line2smd_pin = 0.004200
    line2shape = 0.008000
    line2tst_pin = 0.005000
    line2tst_via = 0.005000
    line2thru_pin = 0.005000
    line2thru_via = 0.004000
    shape2smd_pin = 0.004250
    shape2shape = 0.010000
    shape2tst_pin = 0.008000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.008000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.004000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.004000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.004000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.004000
    tst_via2thru_pin = 0.004000
    tst_via2thru_via = 0.005000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.005000
    thru_pin2bond_pad = 0.004000
    smd_pin2bond_pad = 0.004000
    thru_via2bond_pad = 0.005000
    bond_pad2bond_pad = 0.004000
    bond_pad2line = 0.005000
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.004000
    tst_pin2bond_pad = 0.004000
    tst_via2bond_pad = 0.004000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:33-OHM
    net_type2 = *
    layers = top
    main_set_name = CSET00002
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:33-OHM
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00002
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:33-OHM
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00002
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:33-OHM
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00002
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:33-OHM
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00002
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:33-OHM
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00002
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:33-OHM
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00002
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:33-OHM
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00002
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:33-OHM
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00002
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:33-OHM
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00002
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:33-OHM
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00002
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:33-OHM
    net_type2 = *
    layers = bottom
    set_name = CSET00002
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:40-OHM
    net_type2 = *
    layers = top
    bb_via2bb_via = 0.004000
    bb_via2line = 0.005000
    bb_via2smd_pin = 0.004000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.004000
    bb_via2tst_via = 0.004000
    bb_via2thru_pin = 0.004000
    bb_via2thru_via = 0.005000
    line2line = 0.004000
    line2smd_pin = 0.004200
    line2shape = 0.006000
    line2tst_pin = 0.005000
    line2tst_via = 0.005000
    line2thru_pin = 0.005000
    line2thru_via = 0.004000
    shape2smd_pin = 0.004000
    shape2shape = 0.010000
    shape2tst_pin = 0.008000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.008000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.004000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.004000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.004000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.004000
    tst_via2thru_pin = 0.004000
    tst_via2thru_via = 0.005000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.005000
    thru_pin2bond_pad = 0.004000
    smd_pin2bond_pad = 0.004000
    thru_via2bond_pad = 0.005000
    bond_pad2bond_pad = 0.004000
    bond_pad2line = 0.005000
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.004000
    tst_pin2bond_pad = 0.004000
    tst_via2bond_pad = 0.004000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:40-OHM
    net_type2 = *
    layers = top
    main_set_name = CSET00003
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:40-OHM
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00003
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:40-OHM
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00003
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:40-OHM
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00003
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:40-OHM
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00003
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:40-OHM
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00003
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:40-OHM
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00003
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:40-OHM
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00003
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:40-OHM
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00003
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:40-OHM
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00003
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:40-OHM
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00003
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:40-OHM
    net_type2 = *
    layers = bottom
    set_name = CSET00003
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:66-OHM
    net_type2 = *
    layers = top
    bb_via2bb_via = 0.004000
    bb_via2line = 0.005000
    bb_via2smd_pin = 0.004000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.004000
    bb_via2tst_via = 0.004000
    bb_via2thru_pin = 0.004000
    bb_via2thru_via = 0.005000
    line2line = 0.004000
    line2smd_pin = 0.004200
    line2shape = 0.008000
    line2tst_pin = 0.005000
    line2tst_via = 0.005000
    line2thru_pin = 0.005000
    line2thru_via = 0.004000
    shape2smd_pin = 0.008000
    shape2shape = 0.010000
    shape2tst_pin = 0.008000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.008000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.004000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.004000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.004000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.004000
    tst_via2thru_pin = 0.004000
    tst_via2thru_via = 0.005000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.005000
    thru_pin2bond_pad = 0.004000
    smd_pin2bond_pad = 0.004000
    thru_via2bond_pad = 0.005000
    bond_pad2bond_pad = 0.004000
    bond_pad2line = 0.005000
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.004000
    tst_pin2bond_pad = 0.004000
    tst_via2bond_pad = 0.004000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:66-OHM
    net_type2 = *
    layers = top
    main_set_name = CSET00004
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:66-OHM
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00004
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:66-OHM
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00004
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:66-OHM
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00004
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:66-OHM
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00004
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:66-OHM
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00004
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:66-OHM
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00004
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:66-OHM
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00004
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:66-OHM
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00004
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:66-OHM
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00004
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:66-OHM
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00004
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:66-OHM
    net_type2 = *
    layers = bottom
    set_name = CSET00004
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:80-OHM
    net_type2 = *
    layers = top
    bb_via2bb_via = 0.004000
    bb_via2line = 0.005000
    bb_via2smd_pin = 0.004000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.004000
    bb_via2tst_via = 0.004000
    bb_via2thru_pin = 0.004000
    bb_via2thru_via = 0.005000
    line2line = 0.014000
    line2smd_pin = 0.005000
    line2shape = 0.008000
    line2tst_pin = 0.005000
    line2tst_via = 0.005000
    line2thru_pin = 0.005000
    line2thru_via = 0.004000
    shape2smd_pin = 0.008000
    shape2shape = 0.010000
    shape2tst_pin = 0.008000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.008000
    shape2thru_via = 0.004500
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.004000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.004000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.004000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.004000
    tst_via2thru_pin = 0.004000
    tst_via2thru_via = 0.005000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.005000
    thru_pin2bond_pad = 0.004000
    smd_pin2bond_pad = 0.004000
    thru_via2bond_pad = 0.005000
    bond_pad2bond_pad = 0.004000
    bond_pad2line = 0.005000
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.004000
    tst_pin2bond_pad = 0.004000
    tst_via2bond_pad = 0.004000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:80-OHM
    net_type2 = *
    layers = top
    main_set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:80-OHM
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:80-OHM
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:80-OHM
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:80-OHM
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:80-OHM
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:80-OHM
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:80-OHM
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:80-OHM
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:80-OHM
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:80-OHM
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = N:80-OHM
    net_type2 = *
    layers = bottom
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 80-OHM
    net_type2 = *
    layers = top
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 80-OHM
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 80-OHM
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 80-OHM
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 80-OHM
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 80-OHM
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 80-OHM
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 80-OHM
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 80-OHM
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 80-OHM
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 80-OHM
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 80-OHM
    net_type2 = *
    layers = bottom
    set_name = CSET00005
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 100-OHM-SP
    net_type2 = *
    layers = top
    bb_via2bb_via = 0.010000
    bb_via2line = 0.005000
    bb_via2smd_pin = 0.010000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.010000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.010000
    bb_via2thru_via = 0.005000
    line2line = 0.014000
    line2smd_pin = 0.005000
    line2shape = 0.008000
    line2tst_pin = 0.005000
    line2tst_via = 0.005000
    line2thru_pin = 0.005000
    line2thru_via = 0.005000
    shape2smd_pin = 0.005000
    shape2shape = 0.010000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.010000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.004000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.010000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.010000
    tst_via2thru_via = 0.005000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.005000
    thru_pin2bond_pad = 0.010000
    smd_pin2bond_pad = 0.010000
    thru_via2bond_pad = 0.005000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.005000
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.010000
    tst_via2bond_pad = 0.010000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 100-OHM-SP
    net_type2 = *
    layers = top
    main_set_name = CSET00006
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 100-OHM-SP
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00006
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 100-OHM-SP
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00006
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 100-OHM-SP
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00006
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 100-OHM-SP
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00006
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 100-OHM-SP
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00006
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 100-OHM-SP
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00006
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 100-OHM-SP
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00006
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 100-OHM-SP
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00006
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 100-OHM-SP
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00006
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 100-OHM-SP
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00006
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 100-OHM-SP
    net_type2 = *
    layers = bottom
    set_name = CSET00006
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 33-OHM
    net_type2 = *
    layers = top
    bb_via2bb_via = 0.004000
    bb_via2line = 0.005000
    bb_via2smd_pin = 0.004000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.004000
    bb_via2tst_via = 0.004000
    bb_via2thru_pin = 0.004000
    bb_via2thru_via = 0.005000
    line2line = 0.028000
    line2smd_pin = 0.004200
    line2shape = 0.008000
    line2tst_pin = 0.005000
    line2tst_via = 0.005000
    line2thru_pin = 0.005000
    line2thru_via = 0.004000
    shape2smd_pin = 0.004250
    shape2shape = 0.010000
    shape2tst_pin = 0.008000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.008000
    shape2thru_via = 0.005000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.004000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.004000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.004000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.004000
    tst_via2thru_pin = 0.004000
    tst_via2thru_via = 0.005000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.005000
    thru_pin2bond_pad = 0.004000
    smd_pin2bond_pad = 0.004000
    thru_via2bond_pad = 0.005000
    bond_pad2bond_pad = 0.004000
    bond_pad2line = 0.005000
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.004000
    tst_pin2bond_pad = 0.004000
    tst_via2bond_pad = 0.004000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 33-OHM
    net_type2 = *
    layers = top
    main_set_name = CSET00007
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 33-OHM
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00007
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 33-OHM
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00007
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 33-OHM
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00007
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 33-OHM
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00007
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 33-OHM
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00007
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 33-OHM
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00007
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 33-OHM
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00007
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 33-OHM
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00007
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 33-OHM
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00007
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 33-OHM
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00007
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 33-OHM
    net_type2 = *
    layers = bottom
    set_name = CSET00007
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 40-OHM
    net_type2 = *
    layers = top
    bb_via2bb_via = 0.004000
    bb_via2line = 0.005000
    bb_via2smd_pin = 0.004000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.004000
    bb_via2tst_via = 0.004000
    bb_via2thru_pin = 0.004000
    bb_via2thru_via = 0.005000
    line2line = 0.020000
    line2smd_pin = 0.005000
    line2shape = 0.006000
    line2tst_pin = 0.005000
    line2tst_via = 0.005000
    line2thru_pin = 0.005000
    line2thru_via = 0.004000
    shape2smd_pin = 0.004000
    shape2shape = 0.010000
    shape2tst_pin = 0.008000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.008000
    shape2thru_via = 0.005000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.004000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.004000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.004000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.004000
    tst_via2thru_pin = 0.004000
    tst_via2thru_via = 0.005000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.005000
    thru_pin2bond_pad = 0.004000
    smd_pin2bond_pad = 0.004000
    thru_via2bond_pad = 0.005000
    bond_pad2bond_pad = 0.004000
    bond_pad2line = 0.005000
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.004000
    tst_pin2bond_pad = 0.004000
    tst_via2bond_pad = 0.004000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 40-OHM
    net_type2 = *
    layers = top
    main_set_name = CSET00008
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 40-OHM
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00008
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 40-OHM
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00008
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 40-OHM
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00008
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 40-OHM
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00008
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 40-OHM
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00008
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 40-OHM
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00008
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 40-OHM
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00008
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 40-OHM
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00008
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 40-OHM
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00008
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 40-OHM
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00008
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 40-OHM
    net_type2 = *
    layers = bottom
    set_name = CSET00008
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 66-OHM
    net_type2 = *
    layers = top
    bb_via2bb_via = 0.004000
    bb_via2line = 0.005000
    bb_via2smd_pin = 0.004000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.004000
    bb_via2tst_via = 0.004000
    bb_via2thru_pin = 0.004000
    bb_via2thru_via = 0.005000
    line2line = 0.022000
    line2smd_pin = 0.005000
    line2shape = 0.008000
    line2tst_pin = 0.005000
    line2tst_via = 0.005000
    line2thru_pin = 0.005000
    line2thru_via = 0.004000
    shape2smd_pin = 0.008000
    shape2shape = 0.010000
    shape2tst_pin = 0.008000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.008000
    shape2thru_via = 0.005000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.004000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.004000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.004000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.004000
    tst_via2thru_pin = 0.004000
    tst_via2thru_via = 0.005000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.005000
    thru_pin2bond_pad = 0.004000
    smd_pin2bond_pad = 0.004000
    thru_via2bond_pad = 0.005000
    bond_pad2bond_pad = 0.004000
    bond_pad2line = 0.005000
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.004000
    tst_pin2bond_pad = 0.004000
    tst_via2bond_pad = 0.004000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 66-OHM
    net_type2 = *
    layers = top
    main_set_name = CSET00009
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 66-OHM
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00009
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 66-OHM
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00009
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 66-OHM
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00009
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 66-OHM
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00009
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 66-OHM
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00009
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 66-OHM
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00009
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 66-OHM
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00009
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 66-OHM
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00009
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 66-OHM
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00009
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 66-OHM
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00009
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 66-OHM
    net_type2 = *
    layers = bottom
    set_name = CSET00009
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 85-OHM
    net_type2 = *
    layers = top
    bb_via2bb_via = 0.004000
    bb_via2line = 0.005000
    bb_via2smd_pin = 0.004000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.004000
    bb_via2tst_via = 0.004000
    bb_via2thru_pin = 0.004000
    bb_via2thru_via = 0.005000
    line2line = 0.012000
    line2smd_pin = 0.005000
    line2shape = 0.006000
    line2tst_pin = 0.005000
    line2tst_via = 0.005000
    line2thru_pin = 0.005000
    line2thru_via = 0.004000
    shape2smd_pin = 0.004000
    shape2shape = 0.010000
    shape2tst_pin = 0.008000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.008000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.004000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.004000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.004000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.004000
    tst_via2thru_pin = 0.004000
    tst_via2thru_via = 0.005000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.010000
    thru_pin2bond_pad = 0.004000
    smd_pin2bond_pad = 0.004000
    thru_via2bond_pad = 0.005000
    bond_pad2bond_pad = 0.004000
    bond_pad2line = 0.005000
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.004000
    tst_pin2bond_pad = 0.004000
    tst_via2bond_pad = 0.004000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 85-OHM
    net_type2 = *
    layers = top
    main_set_name = CSET00010
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 85-OHM
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00010
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 85-OHM
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00010
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 85-OHM
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00010
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 85-OHM
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00010
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 85-OHM
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00010
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 85-OHM
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00010
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 85-OHM
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00010
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 85-OHM
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00010
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 85-OHM
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00010
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 85-OHM
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00010
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 85-OHM
    net_type2 = *
    layers = bottom
    set_name = CSET00010
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 90-OHM-SP
    net_type2 = *
    layers = top
    bb_via2bb_via = 0.004000
    bb_via2line = 0.005000
    bb_via2smd_pin = 0.004000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.004000
    bb_via2tst_via = 0.004000
    bb_via2thru_pin = 0.004000
    bb_via2thru_via = 0.005000
    line2line = 0.010200
    line2smd_pin = 0.005000
    line2shape = 0.008000
    line2tst_pin = 0.005000
    line2tst_via = 0.005000
    line2thru_pin = 0.005000
    line2thru_via = 0.004000
    shape2smd_pin = 0.008000
    shape2shape = 0.010000
    shape2tst_pin = 0.008000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.008000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.004000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.004000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.004000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.004000
    tst_via2thru_pin = 0.004000
    tst_via2thru_via = 0.005000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.010000
    thru_pin2bond_pad = 0.004000
    smd_pin2bond_pad = 0.004000
    thru_via2bond_pad = 0.005000
    bond_pad2bond_pad = 0.004000
    bond_pad2line = 0.005000
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.004000
    tst_pin2bond_pad = 0.004000
    tst_via2bond_pad = 0.004000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 90-OHM-SP
    net_type2 = *
    layers = top
    main_set_name = CSET00011
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 90-OHM-SP
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00011
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 90-OHM-SP
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00011
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 90-OHM-SP
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00011
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 90-OHM-SP
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00011
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 90-OHM-SP
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00011
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 90-OHM-SP
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00011
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 90-OHM-SP
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00011
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 90-OHM-SP
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00011
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 90-OHM-SP
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00011
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 90-OHM-SP
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00011
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = 90-OHM-SP
    net_type2 = *
    layers = bottom
    set_name = CSET00011
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = BKDRL11-16
    net_type2 = *
    layers = top
    bb_via2bb_via = 0.004000
    bb_via2line = 0.005000
    bb_via2smd_pin = 0.004000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.004000
    bb_via2tst_via = 0.004000
    bb_via2thru_pin = 0.004000
    bb_via2thru_via = 0.005000
    line2line = 0.008000
    line2smd_pin = 0.005000
    line2shape = 0.006000
    line2tst_pin = 0.005000
    line2tst_via = 0.005000
    line2thru_pin = 0.005000
    line2thru_via = 0.004000
    shape2smd_pin = 0.004000
    shape2shape = 0.010000
    shape2tst_pin = 0.008000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.008000
    shape2thru_via = 0.005000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.004000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.004000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.004000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.004000
    tst_via2thru_pin = 0.004000
    tst_via2thru_via = 0.005000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.005000
    thru_pin2bond_pad = 0.004000
    smd_pin2bond_pad = 0.004000
    thru_via2bond_pad = 0.005000
    bond_pad2bond_pad = 0.004000
    bond_pad2line = 0.005000
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.004000
    tst_pin2bond_pad = 0.004000
    tst_via2bond_pad = 0.004000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = BKDRL11-16
    net_type2 = *
    layers = top
    main_set_name = CSET00012
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = BKDRL11-16
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00012
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = BKDRL11-16
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00012
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = BKDRL11-16
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00012
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = BKDRL11-16
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00012
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = BKDRL11-16
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00012
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = BKDRL11-16
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00012
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = BKDRL11-16
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00012
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = BKDRL11-16
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00012
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = BKDRL11-16
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00012
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = BKDRL11-16
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00012
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = BKDRL11-16
    net_type2 = *
    layers = bottom
    set_name = CSET00012
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = CLS1
    net_type2 = *
    layers = top
    bb_via2bb_via = 0.004000
    bb_via2line = 0.005000
    bb_via2smd_pin = 0.004000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.004000
    bb_via2tst_via = 0.004000
    bb_via2thru_pin = 0.004000
    bb_via2thru_via = 0.005000
    line2line = 0.005000
    line2smd_pin = 0.005000
    line2shape = 0.006000
    line2tst_pin = 0.005000
    line2tst_via = 0.005000
    line2thru_pin = 0.005000
    line2thru_via = 0.004000
    shape2smd_pin = 0.004000
    shape2shape = 0.010000
    shape2tst_pin = 0.008000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.008000
    shape2thru_via = 0.005000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.004000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.004000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.004000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.004000
    tst_via2thru_pin = 0.004000
    tst_via2thru_via = 0.005000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.005000
    thru_pin2bond_pad = 0.004000
    smd_pin2bond_pad = 0.004000
    thru_via2bond_pad = 0.005000
    bond_pad2bond_pad = 0.004000
    bond_pad2line = 0.005000
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.004000
    tst_pin2bond_pad = 0.004000
    tst_via2bond_pad = 0.004000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = CLS1
    net_type2 = *
    layers = top
    main_set_name = CSET00013
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = CLS1
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00013
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = CLS1
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00013
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = CLS1
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00013
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = CLS1
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00013
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = CLS1
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00013
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = CLS1
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00013
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = CLS1
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00013
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = CLS1
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00013
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = CLS1
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00013
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = CLS1
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00013
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = CLS1
    net_type2 = *
    layers = bottom
    set_name = CSET00013
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = DDR-2X
    net_type2 = *
    layers = top
    bb_via2bb_via = 0.010000
    bb_via2line = 0.005000
    bb_via2smd_pin = 0.005000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.005000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.005000
    bb_via2thru_via = 0.010000
    line2line = 0.010000
    line2smd_pin = 0.005000
    line2shape = 0.010000
    line2tst_pin = 0.005000
    line2tst_via = 0.005000
    line2thru_pin = 0.005000
    line2thru_via = 0.004750
    shape2smd_pin = 0.005000
    shape2shape = 0.010000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.005000
    shape2thru_via = 0.005000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.005000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.005000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.005000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.005000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.010000
    thru_pin2bond_pad = 0.005000
    smd_pin2bond_pad = 0.005000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.005000
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.005000
    tst_via2bond_pad = 0.010000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = DDR-2X
    net_type2 = *
    layers = top
    main_set_name = CSET00014
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = DDR-2X
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00014
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = DDR-2X
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00014
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = DDR-2X
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00014
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = DDR-2X
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00014
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = DDR-2X
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00014
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = DDR-2X
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00014
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = DDR-2X
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00014
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = DDR-2X
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00014
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = DDR-2X
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00014
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = DDR-2X
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00014
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = DDR-2X
    net_type2 = *
    layers = bottom
    set_name = CSET00014
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = HDMI
    net_type2 = *
    layers = top
    bb_via2bb_via = 0.006000
    bb_via2line = 0.004750
    bb_via2smd_pin = 0.005000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.005000
    bb_via2tst_via = 0.006000
    bb_via2thru_pin = 0.005000
    bb_via2thru_via = 0.006000
    line2line = 0.013000
    line2smd_pin = 0.005000
    line2shape = 0.005000
    line2tst_pin = 0.005000
    line2tst_via = 0.004750
    line2thru_pin = 0.005000
    line2thru_via = 0.004000
    shape2smd_pin = 0.005000
    shape2shape = 0.006000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.005000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.004250
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.005000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.006000
    tst_via2thru_pin = 0.005000
    tst_via2thru_via = 0.006000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.005000
    smd_pin2bond_pad = 0.005000
    thru_via2bond_pad = 0.006000
    bond_pad2bond_pad = 0.006000
    bond_pad2line = 0.004750
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.006000
    tst_pin2bond_pad = 0.005000
    tst_via2bond_pad = 0.006000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = HDMI
    net_type2 = *
    layers = top
    main_set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = HDMI
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = HDMI
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = HDMI
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = HDMI
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = HDMI
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = HDMI
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = HDMI
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = HDMI
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = HDMI
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = HDMI
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = HDMI
    net_type2 = *
    layers = bottom
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-RX
    net_type2 = *
    layers = top
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-RX
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-RX
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-RX
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-RX
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-RX
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-RX
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-RX
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-RX
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-RX
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-RX
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-RX
    net_type2 = *
    layers = bottom
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-TX
    net_type2 = *
    layers = top
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-TX
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-TX
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-TX
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-TX
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-TX
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-TX
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-TX
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-TX
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-TX
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-TX
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = MCU-RGMII-TX
    net_type2 = *
    layers = bottom
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = SD-CARD-MMC1
    net_type2 = *
    layers = top
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = SD-CARD-MMC1
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = SD-CARD-MMC1
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = SD-CARD-MMC1
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = SD-CARD-MMC1
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = SD-CARD-MMC1
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = SD-CARD-MMC1
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = SD-CARD-MMC1
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = SD-CARD-MMC1
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = SD-CARD-MMC1
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = SD-CARD-MMC1
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00015
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = SD-CARD-MMC1
    net_type2 = *
    layers = bottom
    set_name = CSET00015
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR
    net_type2 = *
    layers = top
    bb_via2bb_via = 0.010000
    bb_via2line = 0.004750
    bb_via2smd_pin = 0.005000
    bb_via2shape = 0.008000
    bb_via2tst_pin = 0.005000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.005000
    bb_via2thru_via = 0.010000
    line2line = 0.004800
    line2smd_pin = 0.005000
    line2shape = 0.008000
    line2tst_pin = 0.005000
    line2tst_via = 0.004750
    line2thru_pin = 0.005000
    line2thru_via = 0.004000
    shape2smd_pin = 0.008000
    shape2shape = 0.008000
    shape2tst_pin = 0.008000
    shape2tst_via = 0.008000
    shape2thru_pin = 0.008000
    shape2thru_via = 0.006000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.005000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.004250
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.005000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.005000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.005000
    smd_pin2bond_pad = 0.005000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.004750
    bond_pad2shape = 0.008000
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.005000
    tst_via2bond_pad = 0.010000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR
    net_type2 = *
    layers = top
    main_set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR
    net_type2 = *
    layers = bottom
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR-SP
    net_type2 = *
    layers = top
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR-SP
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR-SP
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR-SP
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR-SP
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR-SP
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR-SP
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR-SP
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR-SP
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR-SP
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR-SP
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00016
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = PWR-SP
    net_type2 = *
    layers = bottom
    set_name = CSET00016
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = top
    bb_via2bb_via = 0.006000
    bb_via2line = 0.004750
    bb_via2smd_pin = 0.005000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.005000
    bb_via2tst_via = 0.006000
    bb_via2thru_pin = 0.005000
    bb_via2thru_via = 0.006000
    line2line = 0.006000
    line2smd_pin = 0.005000
    line2shape = 0.005000
    line2tst_pin = 0.005000
    line2tst_via = 0.004750
    line2thru_pin = 0.005000
    line2thru_via = 0.004000
    shape2smd_pin = 0.005000
    shape2shape = 0.006000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.005000
    shape2thru_via = 0.005000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.005000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.004250
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.005000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.006000
    tst_via2thru_pin = 0.005000
    tst_via2thru_via = 0.006000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.012000
    thru_pin2bond_pad = 0.005000
    smd_pin2bond_pad = 0.005000
    thru_via2bond_pad = 0.006000
    bond_pad2bond_pad = 0.006000
    bond_pad2line = 0.004750
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.006000
    tst_pin2bond_pad = 0.005000
    tst_via2bond_pad = 0.006000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = top
    main_set_name = CSET00017
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l2-gnd1
    set_name = CSET00017
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l3-signal1
    set_name = CSET00017
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00017
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00017
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l6-pwr1
    set_name = CSET00017
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l7-pwr2
    set_name = CSET00017
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l8-signal3
    set_name = CSET00017
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l9-gnd3
    set_name = CSET00017
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00017
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00017
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = bottom
    set_name = CSET00017
}

CNSA_NET_TYPE_PHYSICAL_PARAMS {
    constr_area = *
    net_type = *
    layers = *
    min_line_width = 0.006500
    min_neck_width = 0.004000
    max_line_length = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = ECS1
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-OSPI0-D0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MMC0-DAT2
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-DQ8
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-DQ0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-DQ16
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-DQ24
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR0-CA5
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR1-CA5
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MMC0-CLK
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MLB0-MLBCLK-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = CSI0-RXCLK-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = CSI1-RX0-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MMC0-CMD
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = RGMII1-RX-CTL
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-RGMII1-TD3
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCASP1-AXR7-PRG0-RGMII2-TD0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = VOUT0-DATA12-PRG1-RGMII2-TD1
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = VOUT0-DATA11-PRG1-RGMII2-TD0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = PRG0-RGMII-R
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCASP0-AXR0-PRG0-RGMII1-RD0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = GPIO0-66-PRG0-RGMII2-RD3
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = GPIO0-4-PRG1-RGMII1-RD3
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = VOUT0-DATA3-PRG1-RGMII2-RD3
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = VOUT0-DATA4-PRG1-RGMII2-RX-CTL
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-OSPI1-D0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-RGMII1-RD3
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = VOUT0-DATA6-PRG1-RGMII2-RXC
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = VOUT0-DATA0-PRG1-RGMII2-RD0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCASP0-AXR7-PRG0-RGMII1-TD0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = VOUT0-DATA16-PRG1-RGMII1-TD0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = RGMII1-RXC
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-OSPI1-D3
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MMC1-CMD
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = RGMII1-TD3
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MMC1-CLK
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-OSPI1-CLK
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = SOC-MCU-OSPI0-CLK-R
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = SOC-MCU-OSPI0-D0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = SOC-MCU-OSPI0-D7
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = SOC-MCU-OSPI0-D5
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DSI0-TX0-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-OSPI0-DQS
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-OSPI0-CLK
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-ONAND-D7
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-ONAND-CLK
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-HYPERBUS0-CK
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-HYPERBUS0-DQ0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-ONAND-D0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-HYPERBUS0-RWDS-R
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = CS-HYPERBUS0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = CS-MCU-OSPI0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = CS-MCU-OSPI1
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = CS-SOC-MCU-OSPI0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR1-ADD-SOC-TPOINT
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR0-DL3
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR0-DL2
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR0-DL1
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR1-DL2
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR0-DL0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR1-DL3
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR1-CA
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR1-DL1
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR1-DL0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR0-CA
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = 66-OHM
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = 100-OHM
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = 90-OHM
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ECSET_ENTRY {
    net_name = DDR0_CK_C
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR0_CK_T
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR0_DQS0_N
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR0_DQS0_P
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR0_DQS1_N
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR0_DQS1_P
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR0_DQS2_N
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR0_DQS2_P
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR0_DQS3_N
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR0_DQS3_P
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR1_CK_C
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR1_CK_T
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR1_DQS0_N
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR1_DQS0_P
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR1_DQS1_N
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR1_DQS1_P
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR1_DQS2_N
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR1_DQS2_P
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR1_DQS3_N
    ecset_name = 90-OHM
}

NET_ECSET_ENTRY {
    net_name = DDR1_DQS3_P
    ecset_name = 90-OHM
}

