ZHCSFB6C April 2016  – July  2017 THS4551

PRODUCTION DATA. 

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1Absolute Maximum Ratings
    2. 6.2ESD Ratings
    3. 6.3Recommended Operating Conditions
    4. 6.4Thermal Information
    5. 6.5Electrical Characteristics: (VS+) - (VS-) = 5 V
    6. 6.6Electrical Characteristics: (VS+) - (VS-) = 3 V
    7. 6.7Typical Characteristics: (VS+) - (VS-) = 5 V
    8. 6.8Typical Characteristics: (VS+) - (VS-) = 3 V
    9. 6.9Typical Characteristics: 3-V to 5-V Supply Range
  7. Parameter Measurement Information
    1. 7.1Example Characterization Circuits
    2. 7.2Output Interface Circuit for DC-Coupled Differential Testing
    3. 7.3Output Common-Mode Measurements
    4. 7.4Differential Amplifier Noise Measurements
    5. 7.5Balanced Split-Supply Versus Single-Supply Characterization
    6. 7.6Simulated Characterization Curves
    7. 7.7Terminology and Application Assumptions
  8. Detailed Description
    1. 8.1Overview
    2. 8.2Functional Block Diagram
    3. 8.3Feature Description
      1. 8.3.1Differential Open-Loop Gain and Output Impedance
      2. 8.3.2Setting Resistor Values Versus Gain
      3. 8.3.3I/O Headroom Considerations
      4. 8.3.4Output DC Error and Drift Calculations and the Effect of Resistor Imbalances
    4. 8.4Device Functional Modes
      1. 8.4.1Operation from Single-Ended Sources to Differential Outputs
        1. 8.4.1.1AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversions
        2. 8.4.1.2DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversions
      2. 8.4.2Operation from a Differential Input to a Differential Output
        1. 8.4.2.1AC-Coupled, Differential-Input to Differential-Output Design Issues
        2. 8.4.2.2DC-Coupled, Differential-Input to Differential-Output Design Issues
      3. 8.4.3Input Overdrive Performance
  9. Application and Implementation
    1. 9.1Application Information
      1. 9.1.1Noise Analysis
      2. 9.1.2Factors Influencing Harmonic Distortion
      3. 9.1.3Driving Capacitive Loads
      4. 9.1.4Interfacing to High-Performance Precision ADCs
      5. 9.1.5Operating the Power Shutdown Feature
      6. 9.1.6Designing Attenuators
      7. 9.1.7The Effect of Adding a Feedback Capacitor
    2. 9.2Typical Applications
      1. 9.2.1An MFB Filter Driving an ADC Application
        1. 9.2.1.1Design Requirements
        2. 9.2.1.2Detailed Design Procedure
        3. 9.2.1.3Application Curves
      2. 9.2.2Differential Transimpedance Output to a High-Grade Audio PCM DAC Application
        1. 9.2.2.1Design Requirements
        2. 9.2.2.2Detailed Design Procedure
        3. 9.2.2.3Application Curves
      3. 9.2.3ADC3k Driver with a 2nd-Order RLC Interstage Filter Application
        1. 9.2.3.1Design Requirements
        2. 9.2.3.2Detailed Design Procedure
        3. 9.2.3.3Application Curve
  10. 10Power Supply Recommendations
    1. 10.1Thermal Analysis
  11. 11Layout
    1. 11.1Layout Guidelines
      1. 11.1.1Board Layout Recommendations
    2. 11.2Layout Example
    3. 11.3EVM Board
  12. 12器件和文档支持
    1. 12.1器件支持
      1. 12.1.1TINA-TI仿真模型 特性
    2. 12.2文档支持
      1. 12.2.1相关文档
    3. 12.3接收文档更新通知
    4. 12.4社区资源
    5. 12.5商标
    6. 12.6静电放电警告
    7. 12.7Glossary
  13. 13机械、封装和可订购信息

特性

  • 带宽:150MHz (G = 1V/V)
  • 差分输出转换率:220V/µs
  • 增益带宽积:135MHz
  • 负轨输入 (NRI),
    轨到轨输出 (RRO)
  • 宽输出共模控制范围
  • 单电源工作电压范围:2.7V 至 5.4V
  • 修整电源电流:5V 时为 1.37mA
  • 25°C 下的输入偏移电压:±175µV(最大值)
  • 输入偏移电压漂移:±1.8µV/°C(最大值)
  • 差分输入电压噪声:3.3nV/√Hz
  • HD2:-128dBc(2 VPP、100kHz 时)
  • HD3:-139dBc(2 VPP、100kHz 时)
  • 短于 50ns 的稳定时间:4V 阶跃,容限为 0.01%
  • 18 位稳定时间:4V 阶跃,< 500ns

应用

  • 24位 Δ-Σ 模数转换器 (ADC) 驱动器
  • 16 位至 20 位差分高速逐次逼近寄存器 (SAR) 驱动器
  • 差分有源滤波器
  • 差分互阻抗放大器
  • 引脚兼容性升级至 THS4521(仅限 VSSOP-8)

说明

THS4551 全差分放大器可在单端源与差分输出之间提供一个简单的接口,从而满足各类高精度模数转换器 (ADC) 的需求。此器件兼具优异的直流精度、低噪声以及稳健的容性负载驱动能力,非常适用于具有高精度要求的数据采集系统;同时在放大器与 ADC 协同作用下,可获得出色的信噪比 (SNR) 与无杂散动态范围 (SFDR)。

THS4551 特有 负轨输入,可用于将直流耦合中央接地源信号连接到单电源差分输入 ADC。该器件具有超低直流误差和漂移,能够满足新兴的 16 至 20 位逐次逼近寄存器 (SAR) 输入要求。在 0.7V 至 3.0 V 以上的 ADC 共模输入要求下,宽范围输出共模控制支持 ADC 在 1.8V 至 5V 电源下运行。

THS4551 器件可在 –40°C 至 +125°C 的宽温度范围内额定运行,并且提供 8 引脚超薄小外形尺寸 (VSSOP) 封装、16 引脚超薄四方扁平无引线 (VQFN) 封装以及 10 引脚超薄四方扁平无引线 (WQFN) 封装。

THS4551 支持的低功耗 ADC

器件编号ADC 类型分辨率,速度
ADS127L01Δ-Σ24 位,0.512MSPS
ADS8881SAR18 位,1MSPS
ADS9110SAR18 位,2MSPS
ADC3241流水线14 位,25MSPS
  1. 如需了解所有可用封装,请参见数据表末尾的可订购产品附录。

简化原理图:1V/V 增益、单端输入转差分输出、500kHz、
ADS127L01 多反馈滤波器接口

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