SN74AUP1G80 (正在供货)

低功耗单路上升沿 D 类触发器

低功耗单路上升沿 D 类触发器 - SN74AUP1G80
数据表
 

备选器件推荐

  • SN74AUC1G80  -  Single D-Type Flip-Flop, Faster Speed - Tpd: 2.4ns

Smaller and easy-to-manufacture package option available

This device is now available in a 0.8 x 0.8 x 0.4 (mm) DPW package for space-constrained designs. Order now

描述

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family assures a low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life (see AUP – The Lowest-Power Family). This product also maintains excellent signal integrity (see Excellent Signal Integrity).

This is a single positive-edge-triggered D-type flip-flop. When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

特性

  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Available in the Texas Instruments NanoStar™ Package
  • Low Static-Power Consumption
    (ICC = 0.9 µA Maximum)
  • Low Dynamic-Power Consumption
    (Cpd = 4.3 pF Typical at 3.3 V)
  • Low Input Capacitance (Ci = 1.5 pF Typical)
  • Low Noise – Overshoot and Undershoot <10% of VCC
  • Ioff Supports Partial-Power-Down Mode Operation
  • Schmitt-Trigger Action Allows Slow Input Transition and Better Switching Noise Immunity at the Input
    (Vhys = 250 mV Typical at 3.3 V)
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 4.4 ns Maximum at 3.3 V
  • Suitable for Point-to-Point Applications

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参数 与其它产品相比 D 类触发器

 
Technology Family
VCC (Min) (V)
VCC (Max) (V)
Bits (#)
Voltage (Nom) (V)
F @ Nom Voltage (Max) (Mhz)
ICC @ Nom Voltage (Max) (mA)
tpd @ Nom Voltage (Max) (ns)
Output Drive (IOL/IOH) (Max) (mA)
3-State Output
Rating
Operating Temperature Range (C)
Pin/Package
SN74AUP1G80 SN74AUC1G79 SN74AUP1G74 SN74AUP1G79 SN74AUP2G79 SN74LVC1G79
AUP    AUC    AUP    AUP    AUP    LVC   
0.8    0.8    0.8    0.8    0.8    1.65   
3.6    2.7    3.6    3.6    3.6    5.5   
1    1    1    1    2    1   
0.8
1.2
1.5
1.8
2.5
3.3   
0.8
1.2
1.5
1.8
2.5   
0.8
1.2
1.5
1.8
2.5
3.3   
0.8
1.2
1.5
1.8
2.5
3.3   
0.8
1.2
1.5
1.8
2.5
3.3   
1.8
2.5
3.3
5   
100    250    100    100    100    150   
0.0009    0.01    0.0009    0.0009    0.0009    0.01   
28.4
20.7
14.1
11.2
7.9
6.4   
5
2.9
2.5
1.9
1.3   
38
26
17
13
9
7   
27.2
17.3
11.8
9.6
7
5.8   
27.2
17.3
13.3
11.3
7.8
6.3   
12
8.5
6
5   
4/-4    9/-9    4/-4    4/-4    4/-4    32/-32   
No    No    No    No    No    No   
Catalog    Catalog    Catalog    Catalog    Catalog    Catalog   
-40 to 85    -40 to 85    -40 to 85    -40 to 85    -40 to 85    -40 to 125
-40 to 85   
5DSBGA
5SC70
5SOT-23
5X2SON
6DSBGA
6SON   
5SC70
5SOT-23   
8DSBGA
8UQFN
8VSSOP
8X2SON   
5DSBGA
5SC70
5SOT-23
5SOT-5X3
5X2SON
6DSBGA
6SON   
8DSBGA
8UQFN
8VSSOP
8X2SON   
5DSBGA
5SC70
5SOT-23
5SOT-5X3