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线性和低压降 (LDO) 稳压器

LP38500-ADJ

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1.5A、可调节超低压降稳压器

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数据表

LP38500-ADJ

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数据表 立即订购

产品详情

Output options Adjustable Output Iout (max) (A) 1.5 Vin (max) (V) 5.5 Vin (min) (V) 2.7 Vout (max) (V) 5.1 Vout (min) (V) 0.6 Noise (µVrms) 100 Iq (typ) (mA) 2 Thermal resistance θJA (°C/W) 33 Rating Catalog Load capacitance (min) (µF) 10 Regulated outputs (#) 1 Accuracy (%) 2 PSRR at 100 KHz (dB) 25 Dropout voltage (Vdo) (typ) (mV) 220 Operating temperature range (°C) -40 to 125
Output options Adjustable Output Iout (max) (A) 1.5 Vin (max) (V) 5.5 Vin (min) (V) 2.7 Vout (max) (V) 5.1 Vout (min) (V) 0.6 Noise (µVrms) 100 Iq (typ) (mA) 2 Thermal resistance θJA (°C/W) 33 Rating Catalog Load capacitance (min) (µF) 10 Regulated outputs (#) 1 Accuracy (%) 2 PSRR at 100 KHz (dB) 25 Dropout voltage (Vdo) (typ) (mV) 220 Operating temperature range (°C) -40 to 125
TO-263 (KTT) 5 154.8384 mm² 10.16 x 15.24 TO-263 (NDQ) 5 142.3416 mm² 10.16 x 14.01 WSON (NGS) 8 7.5 mm² 3 x 2.5
  • Input Voltage: 2.7 V to 5.5 V
  • Adjustable Output Voltage: 0.6 V to 5 V
  • FlexCap: Stable with Ceramic, Tantalum, or
    Aluminum Capacitors
  • Stable with 10-µF Input and Output Capacitors
  • Low Ground-Pin Current
  • 25-nA Quiescent Current in Shutdown Mode
  • Ensured Output Current of 1.5 A
  • Ensured VADJ Accuracy of ±1.5% at 25°C (A
    Grade)
  • Ensured Accuracy of ±3.5% at 25°C (STD)
  • Overtemperature and Overcurrent Protection
  • ENABLE Pin (LP38502)
  • Input Voltage: 2.7 V to 5.5 V
  • Adjustable Output Voltage: 0.6 V to 5 V
  • FlexCap: Stable with Ceramic, Tantalum, or
    Aluminum Capacitors
  • Stable with 10-µF Input and Output Capacitors
  • Low Ground-Pin Current
  • 25-nA Quiescent Current in Shutdown Mode
  • Ensured Output Current of 1.5 A
  • Ensured VADJ Accuracy of ±1.5% at 25°C (A
    Grade)
  • Ensured Accuracy of ±3.5% at 25°C (STD)
  • Overtemperature and Overcurrent Protection
  • ENABLE Pin (LP38502)

TI’s FlexCap low-dropout (LDO) linear regulators feature unique compensation that allow use of any type of output capacitor with no limits on minimum or maximum equivalent series resistance (ESR). The LP38500 and LP38502 series of LDOs operates from a 2.7-V to 5.5-V input supply. These ultra-low-dropout linear regulators respond very quickly to step changes in load, making them suitable for low-voltage microprocessor applications. Developed on a CMOS process (utilizing a PMOS pass transistor) the LP38500-ADJ and LP38502-ADJ have low quiescent currents that changes little with load current.

  • GND Pin Current: Typically 2 mA at 1.5-A load current.
  • Disable Mode: Typically 25-nA quiescent current when the EN pin is pulled low. (LP38502-ADJ)
  • Simplified Compensation: Stable with any type of output capacitor, regardless of ESR.
  • Precision Output: grade versions available with 1.5% VADJ tolerance (25°C) and 3% over line, load, and temperature.

TI’s FlexCap low-dropout (LDO) linear regulators feature unique compensation that allow use of any type of output capacitor with no limits on minimum or maximum equivalent series resistance (ESR). The LP38500 and LP38502 series of LDOs operates from a 2.7-V to 5.5-V input supply. These ultra-low-dropout linear regulators respond very quickly to step changes in load, making them suitable for low-voltage microprocessor applications. Developed on a CMOS process (utilizing a PMOS pass transistor) the LP38500-ADJ and LP38502-ADJ have low quiescent currents that changes little with load current.

  • GND Pin Current: Typically 2 mA at 1.5-A load current.
  • Disable Mode: Typically 25-nA quiescent current when the EN pin is pulled low. (LP38502-ADJ)
  • Simplified Compensation: Stable with any type of output capacitor, regardless of ESR.
  • Precision Output: grade versions available with 1.5% VADJ tolerance (25°C) and 3% over line, load, and temperature.
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* 数据表 LP3850x-ADJ, LP3850xA-ADJ 1.5-A Flexcap Low-Dropout Linear Regulator for 2.7-V to 5.5-V Inputs 数据表 (Rev. H) PDF | HTML 2015年 9月 22日

设计和开发

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参考设计

PMP10580 — 针对 Terasic DE0-Nano (Cyclone IV) 的电源解决方案 - 参考设计

PMP10580 参考设计提供为 Altera 的 Cyclone® IV FPGA 供电时所需的所有电源轨。DE0-Nano 由 Terasic 开发，该板可通过 Terasic 的网站购买。
测试报告: PDF
原理图: PDF
封装 引脚 下载
TO-263 (KTT) 5 查看选项
TO-263 (NDQ) 5 查看选项
WSON (NGS) 8 查看选项
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