LMH0340

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具有 LVDS 接口的 3G HD/SD DVB-ASI SDI 串行器和驱动器

产品详情

Function Serializer Supply voltage (V) 2.5, 3.3 Power consumption (mW) 475 Data rate (max) (Mbps) 2970 Control interface Pin/SMBus Operating temperature range (°C) -40 to 85
Function Serializer Supply voltage (V) 2.5, 3.3 Power consumption (mW) 475 Data rate (max) (Mbps) 2970 Control interface Pin/SMBus Operating temperature range (°C) -40 to 85
WQFN (RHS) 48 49 mm² 7 x 7
  • LVDS Interface to Host FPGA
  • No External VCO or Clock Ref Required
  • Integrated Variable Output Cable Driver
  • 3.3V SMBus Configuration Interface
  • Integrated TXCLK PLL Cleans Clock Noise
  • Small 48-Pin WQFN Package
  • Industrial Temperature range: -40°C to 85°C

Key Specifications

  • Output Compliant With SMPTE 424M, SMPTE 292M, SMPTE 259M-C and DVB-ASI
  • Typical Power Dissipation: 440 mW
  • 30 ps Typical Output Jitter (HD, 3G)

All trademarks are the property of their respective owners.

  • LVDS Interface to Host FPGA
  • No External VCO or Clock Ref Required
  • Integrated Variable Output Cable Driver
  • 3.3V SMBus Configuration Interface
  • Integrated TXCLK PLL Cleans Clock Noise
  • Small 48-Pin WQFN Package
  • Industrial Temperature range: -40°C to 85°C

Key Specifications

  • Output Compliant With SMPTE 424M, SMPTE 292M, SMPTE 259M-C and DVB-ASI
  • Typical Power Dissipation: 440 mW
  • 30 ps Typical Output Jitter (HD, 3G)

All trademarks are the property of their respective owners.

The LMH0340/0040/0070/0050 SDI Serializers are part of TI’s family of FPGA-Attach SER/DES products supporting 5-bit LVDS interfaces with FPGAs. An FPGA Host will format data with supplied IP such that the output of the LMH0340 is compliant with the requirements of DVB-ASI, SMPTE 259M-C, SMPTE 292M and SMPTE 424M standards. See for details on which Standards are supported per device.

The interface between the SER (Serializer) and the FPGA consists of a 5 bit wide LVDS data bus, an LVDS clock and an SMBus interface. The LMH0340/0040/0070 SER devices include an integrated cable driver which is fully compliant with all of the SMPTE specifications listed above. The LMH0050 has a CML output driver that can drive a differential transmission line or interface to a cable driver.

The FPGA-Attach SER/DES family is supported by a suite of IP which allows the design engineer to quickly develop video applications using the SER/DES products. The SER is packaged in a physically small 48-pin WQFN package.

The LMH0340/0040/0070/0050 SDI Serializers are part of TI’s family of FPGA-Attach SER/DES products supporting 5-bit LVDS interfaces with FPGAs. An FPGA Host will format data with supplied IP such that the output of the LMH0340 is compliant with the requirements of DVB-ASI, SMPTE 259M-C, SMPTE 292M and SMPTE 424M standards. See for details on which Standards are supported per device.

The interface between the SER (Serializer) and the FPGA consists of a 5 bit wide LVDS data bus, an LVDS clock and an SMBus interface. The LMH0340/0040/0070 SER devices include an integrated cable driver which is fully compliant with all of the SMPTE specifications listed above. The LMH0050 has a CML output driver that can drive a differential transmission line or interface to a cable driver.

The FPGA-Attach SER/DES family is supported by a suite of IP which allows the design engineer to quickly develop video applications using the SER/DES products. The SER is packaged in a physically small 48-pin WQFN package.

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类型 标题 下载最新的英语版本 日期
* 数据表 LMH0340/040/070/050 3Gbps, HD, SD, DVB-ASI SDI Serializr & Cable Drvr w/LVDS I/F 数据表 (Rev. I) 2013年 4月 16日
选择指南 Broadcast and Professional Video Interface Solutions (Rev. E) 2017年 4月 5日
应用手册 AN-1943 Understanding Serial Digital Video Bit Rates (Rev. A) 2013年 4月 26日
应用手册 AN-1972 Board Layout Challenges in Serial Digital Interface (Rev. C) 2013年 4月 26日
应用手册 AN-1988 LMH0340 / LMH0341 SerDes Family LVDS Timing Overview (Rev. A) 2013年 4月 26日
应用手册 AN-2145 Power Considerations for SDI Products (Rev. B) 2013年 4月 26日
应用手册 AN-2146 Power Design for SDI and Other Noise-Sensitive Devices (Rev. A) 2013年 4月 26日
应用手册 Triple Rate SDI IP FPGA Resource Utilization on SDXILEVK/AES-EXP-SDI-G Ref Dsgn (Rev. A) 2013年 4月 26日
用户指南 SDALTEVK HSMC SDI Adapter board 2012年 3月 5日
用户指南 Triple-Rate SDI and Video Clocking Daughter Card 2012年 1月 26日
应用手册 High-Speed Board Layout Challenges in FPGA/SDI Sub-Systems 2009年 11月 12日
应用手册 Application Note 1972 Board Layout Challenges in Serial Digital Interface (cn) 2009年 9月 13日
应用手册 DS25CP104 in 3G SDI Router Application 2008年 8月 20日
应用手册 A 3 Gbps SDI Connectivity Solution Supporting Uncompressed 1080p60 Video 2008年 3月 18日
设计指南 Broadcast Video Owner's Manual 2006年 11月 17日

设计和开发

如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。

代码示例或演示

BROADCAST_VIDEO_SERDES_IP — 用于 LVDS 接口 SDI 串行器/解串器的广播视频支持代码

We have developed a family of serializers and deserializers intended to support the serial digital interface (SDI) standards of the Society of Motion Picture and Television Engineers (SMPTE). These devices connect to a host FPGA through a moderate speed, moderate width (600 Mbps, 5 bits wide) (...)
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用户指南: PDF
英语版 (Rev.A): PDF
封装 引脚 下载
WQFN (RHS) 48 查看选项

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

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