ZHCSFZ2 February 2017 DAC8775

PRODUCTION DATA. 

  1. 特性
  2. 应用范围
  3. 说明
  4. 修订历史记录
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1Absolute Maximum Ratings
    2. 7.2ESD Ratings
    3. 7.3Recommended Operating Conditions
    4. 7.4Thermal Information
    5. 7.5Electrical Characteristics
    6. 7.6Timing Requirements: Write and Readback Mode
    7. 7.7Typical Characteristics
  8. Detailed Description
    1. 8.1Overview
    2. 8.2Functional Block Diagram
    3. 8.3Feature Description
      1. 8.3.1 Current Output Stage
      2. 8.3.2 Voltage Output Stage
      3. 8.3.3 Buck-Boost Converter
        1. 8.3.3.1Buck-Boost Converters Outputs
        2. 8.3.3.2Selecting and Enabling Buck-Boost Converters
        3. 8.3.3.3Configurable Clamp Feature and Current Output Settling Time
          1. 8.3.3.3.1Default Mode - CCLP[1:0] = "00" - Current Output Only
          2. 8.3.3.3.2Fixed Clamp Mode - CCLP[1:0] = "01" - Current and Voltage Output
          3. 8.3.3.3.3Auto Learn Mode - CCLP[1:0] = "10" - Current Output Only
          4. 8.3.3.3.4High Side Clamp (HSCLMP)
        4. 8.3.3.4Buck-Boost Converters and Open Circuit Current Output
      4. 8.3.4 Analog Power Supply
      5. 8.3.5 Digital Power Supply
      6. 8.3.6 Internal Reference
      7. 8.3.7 Power-On-Reset
      8. 8.3.8 ALARM Pin
      9. 8.3.9 Power GOOD Bits
      10. 8.3.10Status Register
      11. 8.3.11Status Mask
      12. 8.3.12Alarm Action
      13. 8.3.13Watchdog Timer
      14. 8.3.14Programmable Slew Rate
      15. 8.3.15HART Interface
    4. 8.4Device Functional Modes
      1. 8.4.1Serial Peripheral Interface (SPI)
        1. 8.4.1.1Stand-Alone Operation
        2. 8.4.1.2Daisy-Chain Operation
      2. 8.4.2SPI Shift Register
      3. 8.4.3Write Operation
      4. 8.4.4Read Operation
      5. 8.4.5Updating the DAC Outputs and LDAC Pin
        1. 8.4.5.1Asynchronous Mode
        2. 8.4.5.2Synchronous Mode
      6. 8.4.6Hardware RESET Pin
      7. 8.4.7Hardware CLR Pin
      8. 8.4.8Frame Error Checking
      9. 8.4.9DAC Data Calibration
        1. 8.4.9.1DAC Data Gain and Offset Calibration Registers
    5. 8.5Register Maps
      1. 8.5.1DAC8775 Commands
      2. 8.5.2Register Maps and Bit Functions
        1. 8.5.2.1 No Operation Register (address = 0x00) [reset = 0x0000]
        2. 8.5.2.2 Reset Register (address = 0x01) [reset = 0x0000]
        3. 8.5.2.3 Reset Config Register (address = 0x02) [reset = 0x0000]
        4. 8.5.2.4 Select DAC Register (address = 0x03) [reset = 0x0000]
        5. 8.5.2.5 Configuration DAC Register (address = 0x04) [reset = 0x0000]
        6. 8.5.2.6 DAC Data Register (address = 0x05) [reset = 0x0000]
        7. 8.5.2.7 Select Buck-Boost Converter Register (address = 0x06) [reset = 0x0000]
        8. 8.5.2.8 Configuration Buck-Boost Register (address = 0x07) [reset = 0x0000]
        9. 8.5.2.9 DAC Channel Calibration Enable Register (address = 0x08) [reset = 0x0000]
        10. 8.5.2.10DAC Channel Gain Calibration Register (address = 0x09) [reset = 0x0000]
        11. 8.5.2.11DAC Channel Offset Calibration Register (address = 0x0A) [reset = 0x0000]
        12. 8.5.2.12Status Register (address = 0x0B) [reset = 0x1000]
        13. 8.5.2.13Status Mask Register (address = 0x0C) [reset = 0x0000]
        14. 8.5.2.14Alarm Action Register (address = 0x0D) [reset = 0x0000]
        15. 8.5.2.15User Alarm Code Register (address = 0x0E) [reset = 0x0000]
        16. 8.5.2.16Reserved Register (address = 0x0F) [reset = N/A]
        17. 8.5.2.17Write Watchdog Timer Register (address = 0x10) [reset = 0x0000]
        18. 8.5.2.18Device ID Register (address = 0x11) [reset = 0x0000]
        19. 8.5.2.19Reserved Register (address 0x12 - 0xFF) [reset = N/A]
  9. Application and Implementation
    1. 9.1Application Information
      1. 9.1.1Buck-Boost Converter External Component Selection
      2. 9.1.2Voltage and Current Ouputs on a Shared Terminal
      3. 9.1.3Optimizing Current Output Settling time with Auto learn Mode
      4. 9.1.4Protection for Industrial Transients
      5. 9.1.5Implementing HART with DAC8775
    2. 9.2Typical Application
      1. 9.2.11W Power Dissipation, Quad Channel, EMC and EMI Protected Analog Output Module with Adaptive Power Management
      2. 9.2.2Design Requirements
      3. 9.2.3Detailed Design Procedure
      4. 9.2.4Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1Layout Guidelines
    2. 11.2Layout Example
  12. 12器件和文档支持
    1. 12.1文档支持
      1. 12.1.1相关文档 
    2. 12.2接收文档更新通知
    3. 12.3社区资源
    4. 12.4商标
    5. 12.5静电放电警告
    6. 12.6Glossary
  13. 13机械、封装和可订购信息

特性

  • 输出电流:
    • 0mA 至 24mA;3.5mA 至 23.5mA;0mA 至 20mA;4mA 至 20mA;±24mA
  • 输出电压(超出/不超出范围的 20%):
    • 0V 至 5V;0V 至 10V;±5V;±10V
    • 0V 至 6V;0V 至 12V;±6V;±12V
  • 自适应电源管理
  • 电压范围较宽的单电源(12V 至 36V)引脚
  • ±0.1% 满量程范围 (FSR) 总未调节误差 (TUE)
  • 微分非线性 (DNL):±1 最低有效位 (LSB) 最大值
  • 5V 内部基准(10ppm/°C 最大值)
  • 5V 内部数字电源输出
  • CRC/帧错误检查,看门狗定时器
  • 保障系统可靠性的过热报警、开路/短路保护
  • 报警条件下的安全操作
  • 自动学习负载检测
  • 宽温度范围:-40°C 至 +125°C

应用范围

  • 4mA 至 20mA 电流环路
  • 模拟输出模块
  • 可编程逻辑控制器 (PLC)
  • 楼宇自动化
  • 传感器发送器
  • 过程控制

说明

DAC8775是一款四通道、精密全集成 16 位、数模转换器 (DAC),具有自适应电源管理功能,设计用于满足工业控制 应用的各项要求。自适应电源管理电路在使能后能够最大程度降低芯片功耗。通过编程设定为电流输出后,电流输出驱动器的电源电压根据电流输出引脚处电压的连续反馈,通过集成降压/升压转换器在 4.5V 至 32V 范围内进行调节。通过编程设定为电压输出后,该电路为电压输出级 (±15V) 生成可编程电源电压。DAC8775 还包括一个 LDO,用于从单电源引脚生成数字电源 (5V)。

DAC8775 还实现了一种高速可寻址远程传感器 (HART) 信号接口,支持在电流输出中叠加外部 HART 信号。电流输出 DAC 转换率由寄存器通过编程设定。在禁用降压/升压转换器时,该器件可将集成降压/升压转换器或外部电源作为 +12V 至 +36V 单一外部电源供电运行。

器件信息(1)

器件型号封装封装尺寸(标称值)
DAC8775VQFN (72)10.00mm x 10.00mm
  1. 要了解所有可用封装,请见数据表末尾的可订购产品附录。

框图

DAC8775 BlockDia_SLVSBY7_DAC8775.gif