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数据转换器
数模转换器 (DAC)
高速 DAC (> 10MSPS)

DAC2900

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双通道、10 位、125MSPS 数模转换器 (DAC)

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数据表

DAC2900

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产品详情

Resolution (Bits) 10 Number of DAC channels 2 Interface type Parallel CMOS Sample/update rate (Msps) 125 Features Low Power Rating Catalog Interpolation 1x Power consumption (typ) (mW) 310 SFDR (dB) 80 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Ext, Int
Resolution (Bits) 10 Number of DAC channels 2 Interface type Parallel CMOS Sample/update rate (Msps) 125 Features Low Power Rating Catalog Interpolation 1x Power consumption (typ) (mW) 310 SFDR (dB) 80 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Ext, Int
TQFP (PFB) 48 81 mm² 9 x 9
  • 125MSPS UPDATE RATE
  • SINGLE SUPPLY: +3.3V or +5V
  • HIGH SFDR: 68dB at fOUT = 20MHz
  • LOW GLITCH: 2pVs
  • LOW POWER: 310mW at +5V
  • INTERNAL REFERENCE
  • POWER-DOWN MODE: 23mW
  • APPLICATIONS
    • COMMUNICATIONS:
          Base Stations, WLL, WLAN
          Baseband I/Q Modulation
    • MEDICAL/TEST INSTRUMENTATION
    • ARBITRARY WAVEFORM GENERATORS (ARB)
    • DIRECT DIGITAL SYNTHESIS (DDS)
  • 125MSPS UPDATE RATE
  • SINGLE SUPPLY: +3.3V or +5V
  • HIGH SFDR: 68dB at fOUT = 20MHz
  • LOW GLITCH: 2pVs
  • LOW POWER: 310mW at +5V
  • INTERNAL REFERENCE
  • POWER-DOWN MODE: 23mW
  • APPLICATIONS
    • COMMUNICATIONS:
          Base Stations, WLL, WLAN
          Baseband I/Q Modulation
    • MEDICAL/TEST INSTRUMENTATION
    • ARBITRARY WAVEFORM GENERATORS (ARB)
    • DIRECT DIGITAL SYNTHESIS (DDS)

The DAC2900 is a monolithic, 10-bit, dual-channel, high-speed Digital-to-Analog Converter (DAC), and is optimized to provide high dynamic performance while dissipating only 310mW on a +5V single supply.

Operating with high update rates of up to 125MSPS, the DAC2900 offers exceptional dynamic performance, and enables the generation of very-high output frequencies suitable for "Direct IF" applications. The DAC2900 has been optimized for communications applications in which separate I and Q data are processed while maintaining tight gain-and offset matching.

Each DAC has a high-impedance differential-current output, suitable for single-ended or differential analog-output configurations.

The DAC2900 combines high dynamic performance with a high throughput rate to create a cost-effective solution for a wide variety of waveform-synthesis applications:

  • Pin compatibility between family members provides 10-bit (DAC2900), 12-bit (DAC2902), and 14-bit (DAC2904) resolution.
  • Pin compatible to the AD9763 dual DAC.
  • Gain matching is typically 0.5% of full-scale, and offset matching is specified at 0.02% max.
  • The DAC2900 utilizes an advanced CMOS process; the segmented architecture minimizes output-glitch energy, and maximizes the dynamic performance.
  • All digital inputs are +3.3V and +5V logic compatible. The DAC2900 has an internal reference circuit, and allows use of an external reference.
  • The DAC2900 is available in a TQFP-48 package, and is specified over the extended industrial temperature range of –40°C to +85°C.

The DAC2900 is a monolithic, 10-bit, dual-channel, high-speed Digital-to-Analog Converter (DAC), and is optimized to provide high dynamic performance while dissipating only 310mW on a +5V single supply.

Operating with high update rates of up to 125MSPS, the DAC2900 offers exceptional dynamic performance, and enables the generation of very-high output frequencies suitable for "Direct IF" applications. The DAC2900 has been optimized for communications applications in which separate I and Q data are processed while maintaining tight gain-and offset matching.

Each DAC has a high-impedance differential-current output, suitable for single-ended or differential analog-output configurations.

The DAC2900 combines high dynamic performance with a high throughput rate to create a cost-effective solution for a wide variety of waveform-synthesis applications:

  • Pin compatibility between family members provides 10-bit (DAC2900), 12-bit (DAC2902), and 14-bit (DAC2904) resolution.
  • Pin compatible to the AD9763 dual DAC.
  • Gain matching is typically 0.5% of full-scale, and offset matching is specified at 0.02% max.
  • The DAC2900 utilizes an advanced CMOS process; the segmented architecture minimizes output-glitch energy, and maximizes the dynamic performance.
  • All digital inputs are +3.3V and +5V logic compatible. The DAC2900 has an internal reference circuit, and allows use of an external reference.
  • The DAC2900 is available in a TQFP-48 package, and is specified over the extended industrial temperature range of –40°C to +85°C.
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类型 标题 下载最新的英语版本 日期
* 数据表 Dual, 10-Bit ,125MSPS Digital-to-Analog Converter 数据表 (Rev. C) 2008年 9月 19日
应用手册 Wideband Complementary Current Output DAC Single-Ended Interface (Rev. A) 2015年 5月 8日
应用手册 所选封装材料的热学和电学性质 2008年 10月 16日
应用手册 高速数据转换 英语版 2008年 10月 16日
EVM 用户指南 DAC290x-EVM: Demo Board (Rev. B) 2005年 9月 20日

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包含信息：
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  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
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  • 封装厂地点

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