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数字多路信号分离器和解码器

CD54ACT139

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双通道 2 线至 4 线解码器/多路信号分离器

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数据表

CD54ACT139

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数据表 立即订购

产品详情

Technology family ACT Number of channels 2 Operating temperature range (°C) -55 to 125 Rating Military Supply current (max) (µA) 80
Technology family ACT Number of channels 2 Operating temperature range (°C) -55 to 125 Rating Military Supply current (max) (µA) 80
CDIP (J) 16 135.3552 mm² 19.56 x 6.92
  • AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage
  • Buffered Inputs
  • Incorporate Two Enable Inputs to Simplify Cascading and/or Data Reception
  • Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • ±24-mA Output Drive Current
    • Fanout to 15 F Devices
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015
  • AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage
  • Buffered Inputs
  • Incorporate Two Enable Inputs to Simplify Cascading and/or Data Reception
  • Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • ±24-mA Output Drive Current
    • Fanout to 15 F Devices
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015

The ’ACT139 devices are dual 2-line to 4-line decoders/demultiplexers designed for 4.5-V to 5.5-V VCC operation. These devices are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When used with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.

The active-low enable (G)\ input can be used as a data line in demultiplexing applications. These decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its driving circuit.

The ’ACT139 devices are dual 2-line to 4-line decoders/demultiplexers designed for 4.5-V to 5.5-V VCC operation. These devices are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When used with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.

The active-low enable (G)\ input can be used as a data line in demultiplexing applications. These decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its driving circuit.
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类型 标题 下载最新的英语版本 日期
* 数据表 CD54ACT139, CD74ACT139 数据表 2003年 3月 7日

订购和质量

包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息：
  • 制造厂地点
  • 封装厂地点

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