UCC38501

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具有 10.5V/10V VCC UVLO 和 6.75V/5.5V PWM UVLO、温度范围为 0°C 至 70°C 的 PFC/PWM 组合控制器

产品详情

Vin (max) (V) 18 Operating temperature range (°C) 0 to 70 Control mode CCM Topology Boost Rating Catalog Duty cycle (max) (%) 100
Vin (max) (V) 18 Operating temperature range (°C) 0 to 70 Control mode CCM Topology Boost Rating Catalog Duty cycle (max) (%) 100
PDIP (N) 20 228.702 mm² 24.33 x 9.4 SOIC (DW) 20 131.84 mm² 12.8 x 10.3
  • Combines PFC and Downstream Converter Controls
  • Controls Boost Preregulator to Near-Unity Power Factor
  • Accurate Power Limiting
  • Improved Feedforward Line Regulation
  • Peak Current-Mode Control in Second Stage
  • Programmable Oscillator
  • Leading-Edge/Trailing-Edge Modulation for Reduced Output Ripple
  • Low Start-up Supply Current
  • Synchronized Second Stage Start-Up, with Programmable Soft-start
  • Programmable Second Stage Shutdown

  • Combines PFC and Downstream Converter Controls
  • Controls Boost Preregulator to Near-Unity Power Factor
  • Accurate Power Limiting
  • Improved Feedforward Line Regulation
  • Peak Current-Mode Control in Second Stage
  • Programmable Oscillator
  • Leading-Edge/Trailing-Edge Modulation for Reduced Output Ripple
  • Low Start-up Supply Current
  • Synchronized Second Stage Start-Up, with Programmable Soft-start
  • Programmable Second Stage Shutdown

The UCC2850x family provides all of the control functions necessary for an active power-factor-corrected preregulator and a second-stage dc-to-dc converter. The controller achieves near-unity power factor by shaping the ac input line current waveform to correspond to the ac input-line voltage using average current-mode control. The dc-to-dc converter uses peak current-mode control to perform the step-down power conversion.

The PFC stage is leading-edge modulated while the second stage is trailing-edge synchronized to allow for minimum overlap between the boost and PWM switches. This reduces ripple current in the bulk-output capacitor.In order to operate with over three-to-one range of input-line voltages, a line feedforward (VFF) is used to keep input power constant with varying input voltage. Generation of VFF is accomplished using IAC in conjunction with an external single-pole filter. This not only reduces external parts count, but also avoids the use of high-voltage components, offering a lower-cost solution. The multiplier then divides the line current by the square of VFF.

The UCC2850x PFC section incorporates a low offset-voltage amplifier with 7.5-V reference, a highly-linear multiplier capable of a wide current range, a high-bandwidth, low offset-current amplifier, with a novel noise-attenuation configuration, PWM comparator and latch, and a high-current output driver. Additional PFC features include over-voltage protection, zero-power detection to turn off the output when VAOUT is below 0.33 V and peak current and power limiting.

The dc-to-dc section relies on an error signal generated on the secondary-side and processes it by performing peak current mode control. The dc-to-dc section also features current limiting, a controlled soft-start, preset operating range with selectable options, and 50% maximum duty cycle.

The UCC28500 and UCC28502 have a wide PFC-UVLO threshold (16.5 V/10 V) for bootstrap bias supply operation. The UCC28501 and UCC28503 are designed with a narrow UVLO range (10.5 V/10 V) more suitable for fixed bias operation. The UCC28500 and UCC28501 have a narrow UVLO threshold for PWM stage (to allow operation down to 75% of nominal bulk voltage), while the UCC28502 and UCC38503 are configured for a much wider operation range for the PWM stage (down to 50% of bulk nominal voltage).

Available in 20-pin N and DW packages.

The UCC2850x family provides all of the control functions necessary for an active power-factor-corrected preregulator and a second-stage dc-to-dc converter. The controller achieves near-unity power factor by shaping the ac input line current waveform to correspond to the ac input-line voltage using average current-mode control. The dc-to-dc converter uses peak current-mode control to perform the step-down power conversion.

The PFC stage is leading-edge modulated while the second stage is trailing-edge synchronized to allow for minimum overlap between the boost and PWM switches. This reduces ripple current in the bulk-output capacitor.In order to operate with over three-to-one range of input-line voltages, a line feedforward (VFF) is used to keep input power constant with varying input voltage. Generation of VFF is accomplished using IAC in conjunction with an external single-pole filter. This not only reduces external parts count, but also avoids the use of high-voltage components, offering a lower-cost solution. The multiplier then divides the line current by the square of VFF.

The UCC2850x PFC section incorporates a low offset-voltage amplifier with 7.5-V reference, a highly-linear multiplier capable of a wide current range, a high-bandwidth, low offset-current amplifier, with a novel noise-attenuation configuration, PWM comparator and latch, and a high-current output driver. Additional PFC features include over-voltage protection, zero-power detection to turn off the output when VAOUT is below 0.33 V and peak current and power limiting.

The dc-to-dc section relies on an error signal generated on the secondary-side and processes it by performing peak current mode control. The dc-to-dc section also features current limiting, a controlled soft-start, preset operating range with selectable options, and 50% maximum duty cycle.

The UCC28500 and UCC28502 have a wide PFC-UVLO threshold (16.5 V/10 V) for bootstrap bias supply operation. The UCC28501 and UCC28503 are designed with a narrow UVLO range (10.5 V/10 V) more suitable for fixed bias operation. The UCC28500 and UCC28501 have a narrow UVLO threshold for PWM stage (to allow operation down to 75% of nominal bulk voltage), while the UCC28502 and UCC38503 are configured for a much wider operation range for the PWM stage (down to 50% of bulk nominal voltage).

Available in 20-pin N and DW packages.

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类型 标题 下载最新的英语版本 日期
* 数据表 BiCMOS PFC/PWM Combination Controller 数据表 (Rev. C) 2001年 11月 8日
应用手册 Avoiding Audible Noise at Light Loads When Using Leading Edge Triggered PFC Con (Rev. C) 2011年 4月 13日
应用手册 A New Synchronization Circuit for Power Converters (Rev. A) 2010年 4月 21日
应用手册 Bootstrap Circuit for Green Mode Applications 2006年 1月 27日
应用手册 Startup Current transient of the Leading Edge Triggered PFC Controllers 2004年 6月 30日
应用手册 Accurate PWM Duty Cycle Clamp 2002年 1月 25日
应用手册 DN-66 UC3854A/B and UC3855A/B Provide Power Limiting with Sinusoidal Input (Rev. A) 2001年 11月 6日

设计和开发

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封装 引脚 下载
PDIP (N) 20 查看选项
SOIC (DW) 20 查看选项

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

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