UCC21225A 4-A, 6-A, 2.5-kVRMS Isolated Dual-Channel Gate Driver in LGA
SLUSCV6 – April2017
- Universal: Dual Low-Side, Dual High-Side or Half-Bridge Driver
- 5 x 5 mm, Space-Saving LGA-13 Package
- Operating Temperature Range –40°C to +125°C
- Switching Parameters:
- 19-ns Typical Propagation Delay
- 10-ns Minimum Pulse Width
- 5-ns Maximum Delay Matching
- 6-ns Maximum Pulse-Width Distortion
- Common-Mode Transient Immunity (CMTI) Greater than 100-V/ns
- Surge Immunity up to 4600-V
- 4-A Peak Source, 6-A Peak Sink Output
- TTL and CMOS Compatible Inputs
- 3-V to 18-V Input VCCI Range to Interface with Both Digital and Analog Controllers
- Up to 25-V VDD Output Drive Supply with 5-V UVLO
- Programmable Dead Time
- Rejects Input Pulses and Noise Transients Shorter than 5-ns
- Fast Disable for Power Sequencing
- Safety-Related and Regulatory Approvals:
- 3535-VPK Isolation per DIN V VDE V 0884-10 and DIN EN 61010-1 (Planned)
- 2500-VRMS Isolation for 1 Minute per UL 1577 (Planned)
- CSA Component Acceptance Notice 5A, IEC 60950-1 IEC 61010-1 End Equipment Standards (Planned)
- CQC Certification per GB4943.1-2011 (Planned)
- Server, Telecom, IT and Industrial Infrastructures
- Isolated Converters in Offline AC-to-DC Power Supplies
- Motor Drive and DC-to-AC Solar Inverters
- LED Lighting
- HEV and BEV Battery Chargers
The UCC21225A is an isolated dual-channel gate driver with 4-A source and 6-A sink peak current in a space-saving 5 mm x 5 mm LGA-13 package. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5-MHz with best-in-class propagation delay and pulse-width distortion, in applications requiring the highest power density.
The input side is isolated from the two output drivers by a 2.5-kVRMS reinforced isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 700-VDC.
This driver can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously when it is set high, and allows normal operation when left open or grounded. As a fail-safe measure, primary-side logic failures force both outputs low.
The device accepts VDD supply voltages up to 25-V. A wide input VCCI range from 3-V to 18-V makes the driver suitable for interfacing with both analog and digital controllers. All the supply voltage pins have under voltage lock-out (UVLO) protection.
With all these advanced features, the UCC21225A enables high power density, high efficiency, and robustness in a wide variety of power applications.
|PART NUMBER||PACKAGE||BODY SIZE (NOM)|
|UCC21225ANPL||NPL LGA (13)||5 mm x 5 mm|
- For all available packages, see the orderable addendum at the end of the data sheet.
Functional Block Diagram
4 Revision History
|April 2017||*||Initial release.|
Copyright© 2017, Texas Instruments Incorporated. An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers.Submit Documentation Feedback