SLUS871D January   2009  – December 2016 UC1846-SP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Reference
      2. 7.3.2  Oscillator
      3. 7.3.3  Slope Compensation
      4. 7.3.4  Error Amplifier
      5. 7.3.5  Current Sense Amplifier
      6. 7.3.6  Current Limit
      7. 7.3.7  Shutdown
      8. 7.3.8  Output Section
      9. 7.3.9  Undervoltage Lockout
      10. 7.3.10 Soft-Start
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VIN < 8 V (Minimum VIN)
      2. 7.4.2 Synchronization
      3. 7.4.3 Parallel Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Oscillator Circuit Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Input Capacitor Selection
          2. 8.2.1.2.2 Output Capacitor Selection
          3. 8.2.1.2.3 Output Inductor Selection
          4. 8.2.1.2.4 Switching Frequency
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Parallel Operation
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
      3. 8.2.3 Soft-Start and Shutdown/Restart Functions Application
      4. 8.2.4 Open-Loop Test Circuit Application
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

FK Package
20-Pin LCCC
Top View
UC1846-SP pinout_fk20_lus871.gif
J or W Package
16-Pin CDIP or CFP
Top View
UC1846-SP pinout_j16_lus871.gif

Pin Functions

PIN I/O DESCRIPTION
NAME CDIP or CFP LCCC
CL SS 1 2 I Current limit/soft-start.
VREF 2 3 O 5.1-V internally generated reference.
CS- 3 4 I Inverting input of current sense operational amplifier.
CS+ 4 5 I Non-Inverting input of current sense operational amplifier.
EA+ 5 7 I Non-Inverting input of error amplifier.
EA- 6 8 I Inverting input of error amplifier.
COMP 7 9 O Output of error amplifier.
CT 8 10 I Timing capacitance. Capacitor connected from CT to ground is charged via current established by RT pin via current mirror. Output pulse dead time is determined by the size of the capacitor during capacitor discharge time.
RT 9 12 I Determines oscillator frequency. VREF sources thru RT to create a current which is mirrored to CT pin.
SYNC 10 13 I/O Sync pin is an output under normal operation when RT is above 4.1-V sync output high. Sync pin is an input when RT pin is high and CT pin tied low.
AOUT 11 14 O Output driver (source/sink).
GND 12 15 — Ground connection.
VC 13 17 I Gate drive collector supply voltage. Decouple with capacitor.
BOUT 14 18 O Output driver (source/sink).
VIN 15 19 I Input voltage decouple with capacitor.
SHUTDOWN 16 20 I Shutdown threshold 350 mV. Voltage above threshold latches off oscillator.
NC — 1, 6, 11 — No connect.

Bare Die Information

DIE THICKNESS BACKSIDE FINISH BACKSIDE POTENTIAL BOND PAD METALLIZATION COMPOSITION BOND PAD THICKNESS
15 mils Silicon with backgrind Floating AlCu2% 2000 nm
UC1846-SP bare_die_slus871.png

Bond Pad Coordinates in Microns

DESCRIPTION PAD NUMBER X MIN Y MIN X MAX Y MAX
Current limit/soft-start 1 2174.24 1661.16 2280.92 1767.84
VREF 2 2235.2 2026.92 2341.88 2133.6
(–) Current sense 3 1996.44 2219.96 2103.12 2326.64
(+) Current sense 4 1635.76 2219.96 1742.44 2326.64
(+) Error amplifier 5 467.36 2219.96 574.04 2326.64
(–) Error amplifier 6 289.56 2219.96 396.24 2326.64
Compensation 7 142.24 1671.32 248.92 1778
CT 8 157.48 1270 264.16 1376.68
RT 9 157.48 939.8 264.16 1046.48
SYNC 10 157.48 172.72 264.16 279.4
OUTPUT A 11 772.16 213.36 889 350.52
GROUND 12 1346.2 81.28 1463.04 208.28
VC 13 1341.12 472.44 1468.12 645.16
OUTPUT B 14 1920.24 213.36 2037.08 350.52
VIN 15 2255.52 320.04 2362.2 426.72
SHUTDOWN 16 2214.88 1107.44 2321.56 1214.12