SBVS291 April 2017 TPS7A84A

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configurations and Functions
  6. Specifications
    1. 6.1Absolute Maximum Ratings
    2. 6.2ESD Ratings
    3. 6.3Recommended Operating Conditions
    4. 6.4Thermal Information
    5. 6.5Electrical Characteristics
    6. 6.6Typical Characteristics
  7. Detailed Description
    1. 7.1Overview
    2. 7.2Functional Block Diagram
    3. 7.3Feature Description
      1. 7.3.1Voltage Regulation Features
        1. 7.3.1.1DC Regulation
        2. 7.3.1.2AC and Transient Response
      2. 7.3.2System Start-Up Features
        1. 7.3.2.1Programmable Soft Start (NR/SS)
        2. 7.3.2.2Internal Sequencing
          1. 7.3.2.2.1Enable (EN)
          2. 7.3.2.2.2Undervoltage Lockout (UVLO) Control
          3. 7.3.2.2.3Active Discharge
        3. 7.3.2.3Power-Good Output (PG)
      3. 7.3.3Internal Protection Features
        1. 7.3.3.1Foldback Current Limit (ICL)
        2. 7.3.3.2Thermal Protection (Tsd)
    4. 7.4Device Functional Modes
      1. 7.4.1Regulation
      2. 7.4.2Disabled
  8. Application and Implementation
    1. 8.1Application Information
      1. 8.1.1External Component Selection
        1. 8.1.1.1Adjustable Operation
        2. 8.1.1.2ANY-OUT Programmable Output Voltage
        3. 8.1.1.3ANY-OUT Operation
        4. 8.1.1.4Increasing ANY-OUT Resolution for LILO Conditions
        5. 8.1.1.5Current Sharing
        6. 8.1.1.6Recommended Capacitor Types
        7. 8.1.1.7Input and Output Capacitor Requirements (CIN and COUT)
        8. 8.1.1.8Feed-Forward Capacitor (CFF)
        9. 8.1.1.9Noise-Reduction and Soft-Start Capacitor (CNR/SS)
      2. 8.1.2Start-Up
        1. 8.1.2.1Circuit Soft-Start Control (NR/SS)
          1. 8.1.2.1.1Inrush Current
        2. 8.1.2.2Undervoltage Lockout (UVLO)
        3. 8.1.2.3Power-Good (PG) Function
      3. 8.1.3AC and Transient Performance
        1. 8.1.3.1 Power-Supply Rejection Ratio (PSRR)
        2. 8.1.3.2Output Voltage Noise
        3. 8.1.3.3Optimizing Noise and PSRR
          1. 8.1.3.3.1Charge Pump Noise
        4. 8.1.3.4 Load Transient Response
      4. 8.1.4DC Performance
        1. 8.1.4.1Output Voltage Accuracy (VOUT)
        2. 8.1.4.2 Dropout Voltage (VDO)
          1. 8.1.4.2.1Behavior When Transitioning From Dropout Into Regulation
      5. 8.1.5Sequencing Requirements
      6. 8.1.6Negatively Biased Output
      7. 8.1.7Reverse Current Protection
      8. 8.1.8Power Dissipation (PD)
        1. 8.1.8.1Estimating Junction Temperature
        2. 8.1.8.2Recommended Area for Continuous Operation (RACO)
    2. 8.2Typical Applications
      1. 8.2.1Low-Input, Low-Output (LILO) Voltage Conditions
        1. 8.2.1.1Design Requirements
        2. 8.2.1.2Detailed Design Procedure
        3. 8.2.1.3Application Curves
  9. Power-Supply Recommendations
  10. 10Layout
    1. 10.1Layout Guidelines
    2. 10.2Layout Example
  11. 11Device and Documentation Support
    1. 11.1Device Support
      1. 11.1.1Development Support
        1. 11.1.1.1Evaluation Models
        2. 11.1.1.2Spice Models
      2. 11.7  Glossary
    2. 11.2Documentation Support
      1. 11.2.1Related Documentation
    3. 11.3Receiving Notification of Documentation Updates
    4. 11.4Community Resources
    5. 11.5Trademarks
    6. 11.6Electrostatic Discharge Caution
    7. 11.7Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Features

  • Low Dropout: 180 mV (maximum) at 3 A With BIAS
  • 0.75% (maximum) Accuracy Over Line, Load, and Temperature With BIAS
  • Output Voltage Noise: 4.4 µVRMS
  • Input Voltage Range:
    • Without BIAS: 1.4 V to 6.5 V
    • With BIAS: 1.1 V to 6.5 V
  • Output Voltage Range:
    • Adjustable Operation: 0.8 V to 5.15 V
    • ANY-OUT™ Operation: 0.8 V to 3.95 V
  • Power-Supply Ripple Rejection:
    • 40 dB at 500 kHz
  • Excellent Load Transient Response
  • Adjustable Soft-Start In-Rush Control
  • Low Thermal Resistance: RθJA = 43.4°C/W
  • Open-Drain Power-Good (PG) Output

Applications

  • Digital Loads: SerDes, FPGAs, and DSPs
  • Instrumentation, Medical, and Audio
  • High-Speed Analog Circuits:
    • VCO, ADC, DAC, and LVDS
  • Imaging: CMOS Sensors and Video ASICs
  • Test and Measurement

Description

The TPS7A84A is a low-noise, low-dropout linear regulator (LDO) capable of sourcing 3 A with only 180-mV of maximum dropout. The device output voltage is pin-programmable from 0.8 V to 3.95 V and adjustable from 0.8 V to 5.15 V using an external resistor divider.

The combination of low-noise, high-PSRR, and high output-current capability makes the TPS7A84A ideal to power noise-sensitive components such as those found in high-speed communications, video, medical, or test and measurement applications. The high performance of the TPS7A84A limits power-supply-generated phase noise and clock jitter, making this device ideal for powering high-performance serializer and deserializer (SerDes), analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and RF components. Specifically, RF amplifiers benefit from the high-performance and > 5-V output capability of the device.

For digital loads [such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and digital signal processors (DSPs)] requiring low-input voltage, low-output (LILO) voltage operation, the exceptional accuracy (0.75% over line, load, and temperature), remote sensing, excellent transient performance, and soft-start capabilities of the TPS7A84A ensure optimal system performance.

The versatility of the TPS7A84A makes the device a component of choice for many demanding applications.

Device Information(1)

PART NUMBERPACKAGEBODY SIZE (NOM)
TPS7A84AVQFN (20)3.50 mm × 3.50 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Typical Application Diagram

TPS7A84A Front_AL_SBVS291.gif

Typical Application Circuit

TPS7A84A Typ_app_sch_sbvs291.gif