SLVSAN2D November   2010  – August 2016 TPS54328

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM Operation
      2. 7.3.2 PWM Frequency and Adaptive On-Time Control
      3. 7.3.3 Auto-Skip Eco-Mode Control
      4. 7.3.4 Soft Start and Pre-Biased Soft Start
      5. 7.3.5 Current Protection
      6. 7.3.6 UVLO Protection
      7. 7.3.7 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Standby Operation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Voltage Resistors Selection
        2. 8.2.2.2 Output Filter Selection
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Bootstrap Capacitor Selection
        5. 8.2.2.5 VREG5 Capacitor Selection
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The TPS54328 is typically used as step down converters, which convert a voltage from 4.5 V to 18 V to a lower voltage. WEBENCH® software is available to aid in the design and analysis of circuits.

8.2 Typical Application

TPS54328 App_Sch_slvsAN2.gif Figure 6. Schematic Diagram

8.2.1 Design Requirements

For this design example, use the parameters listed in Table 1 as the input parameters.

Table 1. Design Parameters

PARAMETER EXAMPLE VALUE
Input voltage 4.5 V to 18 V
Output voltage 1.05 V
Output current 3 A
Output voltage ripple 50 mVPP

8.2.2 Detailed Design Procedure

To begin the design process, you must know a few application parameters:

  • Input voltage range
  • Output voltage
  • Output current
  • Output voltage ripple
  • Input voltage ripple

8.2.2.1 Output Voltage Resistors Selection

The output voltage is set with a resistor divider from the output node to the VFB pin. TI recommends using 1% tolerance or better divider resistors. Start by using Equation 3 to calculate VOUT.

To improve efficiency at very light loads consider using larger value resistors, too high of resistance is more susceptible to noise and voltage errors from the VFB input current is more noticeable.

Equation 3. TPS54328 eq2_lvsaAG1.gif

8.2.2.2 Output Filter Selection

The output filter used with the TPS54328 is an LC circuit. This LC filter has a double pole at:

Equation 4. TPS54328 eq4_lvsaAG1.gif

At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal gain of the TPS54328. The low frequency phase is 180 degrees. At the output filter pole frequency, the gain rolls off at a –40 dB per decade rate and the phase drops rapidly. D-CAP2 introduces a high-frequency zero that reduces the gain roll off to –20 dB per decade and increases the phase to 90 degrees one decade above the zero frequency. The inductor and capacitor selected for the output filter must be selected so that the double pole of Equation 4 is located below the high frequency zero but close enough that the phase boost provided be the high frequency zero provides adequate phase margin for a stable circuit. To meet this requirement use the values in Table 2.

Table 2. Recommended Component Values

OUTPUT VOLTAGE (V) R1 (kΩ) R2 (kΩ) C4 (pF) L1 (µH) C8 + C9 (µF)
1 6.81 22.1 1.5 22 – 68
1.05 8.25 22.1 1.5 22 – 68
1.2 12.7 22.1 1.5 22 – 68
1.8 30.1 22.1 5 - 22 2.2 22 – 68
2.5 49.9 22.1 5 - 22 2.2 22 – 68
3.3 73.2 22.1 5 - 22 2.2 22 – 68
5 124 22.1 5 - 22 3.3 22 – 68
6.5 165 22.1 5 - 22 3.3 22 – 68

Because the DC gain is dependent on the output voltage, the required inductor value increases as the output voltage increases. For higher output voltages at or above 1.8 V, additional phase boost can be achieved by adding a feed forward capacitor (C4) in parallel with R1

The inductor peak-to-peak ripple current, peak current and RMS current are calculated using Equation 5, Equation 6 and Equation 7. The inductor saturation current rating must be greater than the calculated peak current and the RMS or heating current rating must be greater than the calculated RMS current. Use 700 kHz for fSW.

Use 700 kHz for fSW. Make sure the chosen inductor is rated for the peak current of Equation 6 and the RMS current of Equation 7.

Equation 5. TPS54328 eq5_lvsaAG1.gif
Equation 6. TPS54328 eq6_lvsaAG1.gif
Equation 7. TPS54328 eq7_lvsaAG1.gif

For this design example, the calculated peak current is 3.49 A and the calculated RMS current is 3.01 A. The inductor used is a TDK SPM6530-1R5M100 with a peak current rating of 11.5 A and an RMS current rating of 11 A.

The capacitor value and ESR determines the amount of output voltage ripple. The TPS54328 is intended for use with ceramic or other low ESR capacitors. Recommended values range from 22 µF to 68 µF. Use Equation 8 to determine the required RMS current rating for the output capacitor.

Equation 8. TPS54328 eq8_lvsaAG1.gif

For this design two TDK C3216X5R0J226M 22µF output capacitors are used. The typical ESR is 2 mΩ each. The calculated RMS current is 0.271 A and each output capacitor is rated for 4 A.

8.2.2.3 Input Capacitor Selection

The TPS54328 requires an input decoupling capacitor and a bulk capacitor is required depending on the application. TI recommends a ceramic capacitor over 10 µF for the decoupling capacitor. TI recommends an additional 0.1-µF capacitor from VIN to ground to improve the stability of the over-current limit function. The capacitor voltage rating requires to be greater than the maximum input voltage.

8.2.2.4 Bootstrap Capacitor Selection

A 0.1-µF ceramic capacitor must be connected between the VBST and SW pin for proper operation. TI recommends using a ceramic capacitor.

8.2.2.5 VREG5 Capacitor Selection

A 1-µF ceramic capacitor must be connected between the VREG5 and GND pins for proper operation. TI recommends using a ceramic capacitor.

8.2.3 Application Curves

TPS54328 fig_6.gif Figure 7. 1.05 V, Load Transient Response
TPS54328 G008_SLVSAN2.png Figure 9. Efficiency vs Output Current
TPS54328 fig_10.gif Figure 11. Switching Frequency vs Input Voltage
TPS54328 fig_12.gif
IOUT = 3 A
Figure 13. Voltage Ripple at Output
TPS54328 fig_14.gif
IOUT = 3 A
Figure 15. Voltage Ripple at Input
TPS54328 fig_7.gif Figure 8. Start-up Waveform
TPS54328 G009_SLVSAN2.png Figure 10. Light Load Efficiency vs Output Current
TPS54328 fig_11.gif Figure 12. Switching Frequency vs Output Current
TPS54328 fig_13.gif
IOUT = 30 mA
Figure 14. DCM Voltage Ripple at Output