The TLC320AD50C, TLC320AD50I, and TLC320AD52C provide high-resolution signal conversion from digital-to-analog (D/A) and from analog-to-digital (A/D) using oversampling sigma-delta technology. This device consists of a pair of 16-bit synchronous serial conversion paths (one for each direction) and includes an interpolation filter before the DAC and a decimation filter after the ADC. Other overhead functions on the chip include timing (sample rate, FSD delay) and control (programmable gain amplifier, PLL, communication protocol, etc.). The sigma-delta architecture produces high resolution A/D and D/A conversion at a low system cost.
Programmable functions of this device can be selected through the serial interface. Options include reset, power down, communications protocol, signal sampling rate, gain control, and system test modes (see section 6). The TLC320AD50C and TLC320AD52C are characterized for operation from 0°C to 70°C, and the TLC320AD50I is characterized for operation from \x9640°C to 85°C.
|ADC SNR (Typ) (dB)|
|DAC SNR (Typ) (dB)|
|Sampling Rate (Max) (kHz)|
|Package size: mm2:W x L (PKG)|
|Approx. price (US$)|
48LQFP: 81 mm2: 9 x 9 (LQFP | 48)
28SOIC: 184 mm2: 10.3 x 17.9 (SOIC | 28)
|24.91 | 1ku|