TL28L92
- 3.3V to 5V, –40°C to 85°C and 68xxx or 80xxx bus interface
- Dual full-duplex independent asynchronous receiver and transmitters 16 Character FIFOs for each receiver and transmitter
- Pin programming selects 68xxx or 80xxx bus interface
- Programmable data format
- 5 Data to 8 data bits plus parity
- Odd, even, no parity or force parity
- 1 stop, 1.5 stop or 2 stop bits programmable in 1/16-bit increments
- 16-Bit programmable counter and timer
- Programmable baud rate for each receiver and transmitter selectable from:
- 28 Fixed rates: 50Bd to 230.4kBd
- Other baud rates to 1MHz at 16×
- Programmable user-defined rates derived from a programmable counter and timer
- External 1× or 16× Clock
- Parity, framing, and overrun error detection
- False start bit detection
- Line break detection and generation
- Programmable channel mode
- Normal (full-duplex)
- Automatic echo
- Local loopback
- Remote loopback
- Multi-function 7-bit input port (includes IACKN)
- Can serve as clock or control inputs
- Change of state detection on four inputs have typically > 100kΩ pullup resistors
- Change of state detectors for modem control
- Multi-function 8-Bit output port
- Individual bit set and reset capability
- Outputs can be programmed to be status and interrupt signals
- FIFO status for DMA interface
- Versatile interrupt system
- Single interrupt output with eight maskable interrupting conditions
- Output port can be configured to provide a total of up to five separate interrupt outputs that may be wire ORed
- Each FIFO can be programmed for four different interrupt levels
- Watchdog timer for each receiver
- Maximum data transfer rates: 1× – 1Mbits, 16× – 1Mbit/s
- Start-end break interrupt and status
- Detects break which originates in the middle of a character
- On-chip crystal oscillator
- Power down mode
- Receiver time-out mode
- Single 3.3V or 5V power supply
- Meets or exceeds JEDEC 14C ESD requirements
The TL28L92 operates at 3.3V or 5V supply with added features and deeper FIFOs. The configuration on power-up is 16 character receiver, 16 character transmit FIFOs, watchdog timer for each receiver, mode register 0 is added, extended baud rate and overall faster speeds, programmable receiver and transmitter interrupts.
Pin programming allows the device to operate with either the Motorola or Intel bus interface. The bit 3 of the MR0A register allows the device to operate in an 8 byte FIFO mode.
The Texas Instruments TL28L92 Dual Universal Asynchronous Receiver/Transmitter (DUART) is a single-chip CMOS-LSI communications device that provides two full-duplex asynchronous receiver/transmitter channels in a single package. the device interfaces directly with microprocessors, and can be used in a polled or interrupt driven system with modem and DMA interface.
The operating mode and data format of each channel can be programmed independently. Additionally, each receiver and transmitter can select an operating speed as one of 28 fixed baud rates; a 16× clock derived from a programmable counter/timer, or an external 1× or 16× clock. The baud rate generator and counter/timer can operate directly from a crystal or from external clock inputs. The ability to independently program the operating speed of the receiver and transmitter make the DUART particularly attractive for dual-speed channel applications such as clustered terminal systems.
Each receiver and transmitter is buffered by 8 or 16 character FIFOs to minimize the potential of receiver overrun, transmitter underrun, and to reduce interrupt overhead in interrupt driven systems. In addition, a flow control capability is provided via RTS/CTS signaling to disable a remote transmitter when the receiver buffer is full. Also provided on the TL28L92 is a multipurpose 7-bit input port and a multipurpose 8-bit output port. These can be used as general purpose I/O ports or can be assigned specific functions (such as clock inputs or status/interrupt outputs) under program control.
The TL28L92 is available now in 44-pin QFP (FR).
技术文档
类型 | 标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 数据表 | TL28L92 3.3V to 5V Dual Universal Asynchronous Receiver and Transmitter 数据表 (Rev. C) | PDF | HTML | 2024年 4月 26日 |
设计和开发
如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。
PSPICE-FOR-TI — 适用于 TI 设计和模拟工具的 PSpice®
借助 PSpice for TI 的设计和仿真环境及其内置的模型库,您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案,然后再进行布局和制造,可缩短产品上市时间并降低开发成本。
在 PSpice for TI 设计和仿真工具中,您可以搜索 TI (...)
TINA-TI — 基于 SPICE 的模拟仿真程序
TINA-TI 安装需要大约 500MB。直接安装,如果想卸载也很容易。我们相信您肯定会爱不释手。
TINA 是德州仪器 (TI) 专有的 DesignSoft 产品。该免费版本具有完整的功能,但不支持完整版 TINA 所提供的某些其他功能。
如需获取可用 TINA-TI 模型的完整列表,请参阅:SpiceRack - 完整列表
需要 HSpice (...)
封装 | 引脚 | 下载 |
---|---|---|
QFP (FR) | 44 | 查看选项 |
订购和质量
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 鉴定摘要
- 持续可靠性监测
- 制造厂地点
- 封装厂地点