THS6182

正在供货

低功耗 ADSL 和 PLC 线路驱动器

产品详情

Number of channels 2 Architecture DSL Line Driver, PLC Line Driver Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 8 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 33 BW at Acl (MHz) 100 Acl, min spec gain (V/V) 1 Vn at flatband (typ) (nV√Hz) 3.2 Vn at 1 kHz (typ) (nV√Hz) 13 Iq per channel (typ) (mA) 11.5 Vos (offset voltage at 25°C) (max) (mV) 20 Rail-to-rail No Features Adjustable BW/IQ/IOUT, Shutdown Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 54 Input bias current (max) (pA) 15000000 Offset drift (typ) (µV/°C) 50 GBW (typ) (MHz) 100 Iout (typ) (mA) 600 2nd harmonic (dBc) 88 3rd harmonic (dBc) 107 Frequency of harmonic distortion measurement (MHz) 1
Number of channels 2 Architecture DSL Line Driver, PLC Line Driver Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 8 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 33 BW at Acl (MHz) 100 Acl, min spec gain (V/V) 1 Vn at flatband (typ) (nV√Hz) 3.2 Vn at 1 kHz (typ) (nV√Hz) 13 Iq per channel (typ) (mA) 11.5 Vos (offset voltage at 25°C) (max) (mV) 20 Rail-to-rail No Features Adjustable BW/IQ/IOUT, Shutdown Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 54 Input bias current (max) (pA) 15000000 Offset drift (typ) (µV/°C) 50 GBW (typ) (MHz) 100 Iout (typ) (mA) 600 2nd harmonic (dBc) 88 3rd harmonic (dBc) 107 Frequency of harmonic distortion measurement (MHz) 1
HSOIC (DWP) 20 133.444125 mm² 12.825 x 10.405 SOIC (D) 16 59.4 mm² 9.9 x 6 SOIC (DW) 20 131.84 mm² 12.8 x 10.3 VQFN (RHF) 24 20 mm² 5 x 4
  • Low-Power Dissipation Increases ADSL Line Card Density
  • Low THD of -88 dBc (100 , 1 MHz)
  • Low MTPR Driving +20 dBm on the Line
    • -76 dBc With High Bias Setting
    • -74 dBc With Low Bias Setting
  • Wide Output Swing of 44 VPP Differential Into a 200- Differential Load (VCC = ±12 V)
  • High Output Current of 600 mA (Typ)
  • Wide Supply Voltage Range of ±5 V to ±15 V
  • Pin Compatible with EL1503C and EL1508C
    • Multiple Package Options
  • Multiple Power Control Modes
    • 11 mA/ch Full Bias Mode
    • 7.5 mA/ch Mid Bias Mode
    • 4 mA/ch Low Bias Mode
    • 0.25 mA/ch Shutdown Mode
    • IADJ Pin for User Controlled Bias Current
    • Stable Operation Down to 1.8 mA/ch
  • Low Noise for Increased Receiver Sensitivity
    • 3.2 nV/Hz Inverting Current Noise
  • APPLICATIONS
    • Ideal for Full Rate ADSL Applications

PowerPAD is a trademark of Texas Instruments.

  • Low-Power Dissipation Increases ADSL Line Card Density
  • Low THD of -88 dBc (100 , 1 MHz)
  • Low MTPR Driving +20 dBm on the Line
    • -76 dBc With High Bias Setting
    • -74 dBc With Low Bias Setting
  • Wide Output Swing of 44 VPP Differential Into a 200- Differential Load (VCC = ±12 V)
  • High Output Current of 600 mA (Typ)
  • Wide Supply Voltage Range of ±5 V to ±15 V
  • Pin Compatible with EL1503C and EL1508C
    • Multiple Package Options
  • Multiple Power Control Modes
    • 11 mA/ch Full Bias Mode
    • 7.5 mA/ch Mid Bias Mode
    • 4 mA/ch Low Bias Mode
    • 0.25 mA/ch Shutdown Mode
    • IADJ Pin for User Controlled Bias Current
    • Stable Operation Down to 1.8 mA/ch
  • Low Noise for Increased Receiver Sensitivity
    • 3.2 nV/Hz Inverting Current Noise
  • APPLICATIONS
    • Ideal for Full Rate ADSL Applications

PowerPAD is a trademark of Texas Instruments.

The THS6182 is a current feedback differential line driver ideal for full rate ADSL systems. Its extremely low-power dissipation is ideal for ADSL systems that must achieve high densities in ADSL central office rack applications. The unique architecture of the THS6182 allows the quiescent current to be much lower than existing line drivers while still achieving high linearity without the need for excess open loop gain. Fixed multiple bias settings of the amplifiers allow for enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings, an IADJ pin is available to further lower the bias currents while maintaining stable operation with as little as 1.8 mA per channel. The wide output swing of 44 VPP differentially with ±12-V power supplies allows for more dynamic headroom, keeping distortion at a minimum. With a low 3.2 nV/Hz inverting current noise, the THS6182 increases the sensitivity of the receive signals, allowing for better margins and reach.

The THS6182 is a current feedback differential line driver ideal for full rate ADSL systems. Its extremely low-power dissipation is ideal for ADSL systems that must achieve high densities in ADSL central office rack applications. The unique architecture of the THS6182 allows the quiescent current to be much lower than existing line drivers while still achieving high linearity without the need for excess open loop gain. Fixed multiple bias settings of the amplifiers allow for enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings, an IADJ pin is available to further lower the bias currents while maintaining stable operation with as little as 1.8 mA per channel. The wide output swing of 44 VPP differentially with ±12-V power supplies allows for more dynamic headroom, keeping distortion at a minimum. With a low 3.2 nV/Hz inverting current noise, the THS6182 increases the sensitivity of the receive signals, allowing for better margins and reach.

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技术文档

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类型 标题 下载最新的英语版本 日期
* 数据表 Low-Power Dissipation ADSL Line Driver 数据表 (Rev. H) 2007年 6月 11日
电子书 The Signal e-book: 有关运算放大器设计主题的博客文章汇编 英语版 2018年 1月 31日
应用手册 Wireline Data Transmission and Reception 2010年 1月 27日
应用手册 Noise Analysis for High Speed Op Amps (Rev. A) 2005年 1月 17日
EVM 用户指南 THS6182RHFEVM 2003年 8月 5日

设计和开发

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评估板

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用户指南: PDF
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仿真模型

THS6182 PSpice Model (Rev. C)

SLOJ165C.ZIP (58 KB) - PSpice Model
仿真模型

THS6182 TINA-TI Reference Design (Rev. C)

SLAC112C.TSC (98 KB) - TINA-TI Reference Design
仿真模型

THS6182 TINA-TI Spice Model (Rev. A)

SLAM041A.ZIP (5 KB) - TINA-TI Spice Model
模拟工具

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TINA-TI 提供了 SPICE 所有的传统直流、瞬态和频域分析以及更多。TINA 具有广泛的后处理功能,允许您按照希望的方式设置结果的格式。虚拟仪器允许您选择输入波形、探针电路节点电压和波形。TINA 的原理图捕获非常直观 - 真正的“快速入门”。

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用户指南: PDF
英语版 (Rev.A): PDF
封装 引脚 下载
HSOIC (DWP) 20 查看选项
SOIC (D) 16 查看选项
SOIC (DW) 20 查看选项
VQFN (RHF) 24 查看选项

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

支持和培训

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