ZHCSEK0A November   2015  – November 2015 THS4541-Q1

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Device Family Comparison
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: (Vs+) - Vs- = 5 V
    6. 7.6 Electrical Characteristics: (Vs+) - Vs- = 3 V
    7. 7.7 Typical Characteristics
      1. 7.7.1 5-V Single Supply
      2. 7.7.2 3-V Single Supply
      3. 7.7.3 3-V to 5-V Supply Range
  8. 8 Parameter Measurement Information
    1. 8.1 Example Characterization Circuits
    2. 8.2 Frequency-Response Shape Factors
    3. 8.3 I/O Headroom Considerations
    4. 8.4 Output DC Error and Drift Calculations and the Effect of Resistor Imbalances
    5. 8.5 Noise Analysis
    6. 8.6 Factors Influencing Harmonic Distortion
    7. 8.7 Driving Capacitive Loads
    8. 8.8 Thermal Analysis
  9. 9 Detailed Description
    1. 9.1 Overview
      1. 9.1.1 Terminology and Application Assumptions
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Differential I/O
      2. 9.3.2 Power-Down Control Pin (PD)
        1. 9.3.2.1 Operating the Power Shutdown Feature
      3. 9.3.3 Input Overdrive Operation
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operation from Single-Ended Sources to Differential Outputs
        1. 9.4.1.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion
        2. 9.4.1.2 DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversion
        3. 9.4.1.3 Resistor Design Equations for the Single-Ended to Differential Configuration of the FDA
        4. 9.4.1.4 Input Impedance for the Single-Ended to Differential FDA Configuration
      2. 9.4.2 Differential-Input to Differential-Output Operation
        1. 9.4.2.1 AC-Coupled, Differential-Input to Differential-Output Design Issues
        2. 9.4.2.2 DC-Coupled, Differential-Input to Differential-Output Design Issues
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Designing Attenuators
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curve
      2. 10.2.2 Interfacing to High-Performance ADCs
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
        3. 10.2.2.3 Application Curve
  11. 11Power-Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 器件支持
      1. 13.1.1 开发支持
        1. 13.1.1.1 TINA 仿真模型 特性
    2. 13.2 文档支持
      1. 13.2.1 相关文档　
    3. 13.3 社区资源
    4. 13.4 商标
    5. 13.5 静电放电警告
    6. 13.6 Glossary
  14. 14机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Pin Configuration and Functions

RGT Package
16-Pin VQFN With Exposed Thermal Pad
Top View
THS4541-Q1 po_16_los375.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.(1)
FB+ 4 O Noninverted (positive) output feedback
FB– 1 O Inverted (negative) output feedback
IN+ 2 I Noninverting (positive) amplifier input
IN– 3 I Inverting (negative) amplifier input
NC — — No internal connection
OUT+ 10 O Noninverted (positive) amplifier output
OUT– 11 O Inverted (negative) amplifier output
PD 12 I Power down. PD = logic low = power off mode; PD = logic high = normal operation.
Vocm 9 I Common-mode voltage input
Vs+ 5 I Positive power-supply input
6
7
8
Vs– 13 I Negative power-supply input
14
15
16
(1) Solder the exposed thermal pad to a heat-spreading power or ground plane. This pad is electrically isolated from the die, but must be connected to a power or ground plane and not floated.