ZHCSEK0A November   2015  – November 2015 THS4541-Q1

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Device Family Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: (Vs+) - Vs- = 5 V
    6. 7.6 Electrical Characteristics: (Vs+) - Vs- = 3 V
    7. 7.7 Typical Characteristics
      1. 7.7.1 5-V Single Supply
      2. 7.7.2 3-V Single Supply
      3. 7.7.3 3-V to 5-V Supply Range
  8. Parameter Measurement Information
    1. 8.1 Example Characterization Circuits
    2. 8.2 Frequency-Response Shape Factors
    3. 8.3 I/O Headroom Considerations
    4. 8.4 Output DC Error and Drift Calculations and the Effect of Resistor Imbalances
    5. 8.5 Noise Analysis
    6. 8.6 Factors Influencing Harmonic Distortion
    7. 8.7 Driving Capacitive Loads
    8. 8.8 Thermal Analysis
  9. Detailed Description
    1. 9.1 Overview
      1. 9.1.1 Terminology and Application Assumptions
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Differential I/O
      2. 9.3.2 Power-Down Control Pin (PD)
        1. 9.3.2.1 Operating the Power Shutdown Feature
      3. 9.3.3 Input Overdrive Operation
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operation from Single-Ended Sources to Differential Outputs
        1. 9.4.1.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion
        2. 9.4.1.2 DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversion
        3. 9.4.1.3 Resistor Design Equations for the Single-Ended to Differential Configuration of the FDA
        4. 9.4.1.4 Input Impedance for the Single-Ended to Differential FDA Configuration
      2. 9.4.2 Differential-Input to Differential-Output Operation
        1. 9.4.2.1 AC-Coupled, Differential-Input to Differential-Output Design Issues
        2. 9.4.2.2 DC-Coupled, Differential-Input to Differential-Output Design Issues
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Designing Attenuators
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curve
      2. 10.2.2 Interfacing to High-Performance ADCs
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
        3. 10.2.2.3 Application Curve
  11. 11Power-Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 器件支持
      1. 13.1.1 开发支持
        1. 13.1.1.1 TINA 仿真模型 特性
    2. 13.2 文档支持
      1. 13.2.1 相关文档 
    3. 13.3 社区资源
    4. 13.4 商标
    5. 13.5 静电放电警告
    6. 13.6 Glossary
  14. 14机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

9 Detailed Description

9.1 Overview

The THS4541-Q1 is a voltage-feedback (VFA) based, fully-differential amplifier (FDA) offering greater than 500-MHz, small-signal bandwidth at a gain of 2 V/V with trimmed supply current and input offset voltage. The core differential amplifier is a slightly decompensated voltage-feedback design with a high slew-rate, precision input stage. This design gives the 500-MHz gain of 2-V/V small-signal bandwidth shown in the characterization curves, with a 1500-V/µs slew rate, yielding approximately a 340-MHz, 2-VPP, large-signal bandwidth in the same circuit configuration.

The outputs offer near rail-to-rail output swing (0.2-V headroom to either supply), while the device inputs are negative rail inputs with approximately 1.2 V of headroom required to the positive supply. This negative rail input directly supports a bipolar input around ground in a DC-coupled, single-supply design (see Figure 63). Similar to all FDA devices, the output average voltage (common-mode) is controlled by a separate common-mode loop. The target for this output average is set by the Vocm input pin that can be either floated to default near midsupply or driven to a desired output common-mode voltage. The Vocm range extends from a very low 0.91 V above the negative supply to 1.1 V below the positive supply, supporting a wide range of modern analog-to-digital converter (ADC) input common-mode requirements using a single 2.7-V to 5.4-V supply range for the THS4541-Q1.

A power-down pin (PD) is included. Pull the PD pin voltage to the negative supply to turn the device off, putting the THS4541-Q1 into a very-low quiescent current state. For normal operation, the PD pin must be asserted high. When the device is disabled, remember that the signal path is still present through the passive external resistors. Input signals applied to a disabled THS4541-Q1 still appear at the outputs at some level through this passive resistor path as they would for any disabled FDA device.

9.1.1 Terminology and Application Assumptions

Like all widely-used devices, numerous common terms have developed that are unique to this type of device. These terms include:

  • Fully differential amplifier (FDA)—In this document, this term is restricted to devices offering what appears similar to a differential inverting op amp design element that requires an input resistor (not high-impedance input) and includes a second internal control-loop setting the output average voltage (Vocm) to a default or set point. This second loop interacts with the differential loop in some configurations.
  • The desired output signal at the two output pins is a differential signal swinging symmetrically around a common-mode voltage where that is the average voltage for the two outputs.
  • Single-ended to differential—always use the outputs differentially in an FDA; however, the source signal can be either a single-ended source or differential, with a variety of implementation details for either. When the FDA operation is single-ended to differential, only one of the two input resistors receives the source signal with the other input resistor connected to a DC reference (often ground) or through a capacitor to ground.

To simplify, several features in the application of the THS4541-Q1 are not explicitly stated, but are necessary for correct operation. These requirements include:

  • Good power-supply decoupling is required. Minimize the distance (< 0.1") from the power-supply pins to high-frequency, 0.1-μF decoupling capacitors. Often a larger capacitor (2.2 µF is typical) is used along with a high-frequency, 0.1-µF supply decoupling capacitor at the device supply pins (share this capacitor for the four supply pins in the package). For single-supply operation, only the positive supply has these capacitors. When a split supply is used, use these capacitors for each supply to ground. If necessary, place the larger capacitors somewhat farther from the device and share these capacitors among several devices in the same area of the PCB. For each THS4541-Q1, attach a separate 0.1-µF capacitor to a nearby ground plane. With cascaded or multiple parallel channels, including ferrite beads from the larger capacitor is often useful to the local high-frequency decoupling capacitor.
  • Minimize the distance (< 0.1") from the power-supply pins to high-frequency, 0.1-μF decoupling capacitors. At the device pins, the ground and power plane layout should not be in close proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. The power-supply connections (on pins 4 and 7) should always be decoupled with these capacitors. An optional supply decoupling capacitor across the two power supplies (for bipolar operation) improves 2nd-harmonic distortion performance. Larger (2.2μF to 6.8μF) decoupling capacitors, effective at lower frequency, should also be used on the main supply pins. These can be placed somewhat farther from the device and may be shared among several devices in the same area of the PCB.
  • Although not always stated, make sure to tie the power disable pin to the positive supply when only an enabled channel is desired.
  • Virtually all AC characterization equipment expects a 50-Ω termination from the 50-Ω source, and a 50-Ω single-ended source impedance from the device outputs to the 50-Ω sensing termination. This termination is achieved in all characterizations (often with some insertion loss), but is not necessary for most applications. Matching impedance is most often required when transmitting over longer distances. Tight layouts from a source, through the THS4541-Q1, and on to an ADC input do not require doubly-terminated lines or filter designs; the exception is if the source requires a defined termination impedance for correct operation (for example, a SAW filter source).
  • The amplifier signal path is flexible for single or split-supply operation. Most applications are intended to be single supply, but any split-supply design can be used, as long as the total supply across the TH4541 is less than 5.5 V and the required input, output, and common-mode pin headrooms to each supply are observed. Left open, the Vocm pin defaults to near midsupply for any combination of split or single supplies used. The disable pin is negative-rail referenced. Using a negative supply requires the disable pin to be pulled down to within 0.7 V of the negative supply to disable the amplifier.
  • External element values are normally assumed to be accurate and matched. In an FDA, match the feedback resistor values and also match the (DC and AC) impedance from the summing junctions to the source on one side and the reference or ground on the other side. Unbalancing these values introduces nonidealities in the signal path. For the signal path, imbalanced resistor ratios on the two sides create a common-mode to differential conversion. Also, mismatched Rf values and feedback ratios create some added differential output error terms from any common-mode DC, ac signal, or noise terms. Snapping to standard 1% resistor values is a typical approach and generally leads to some nominal feedback ratio mismatch. Mismatched resistors or ratios do not in themselves degrade harmonic distortion. If there is meaningful CM noise or distortion coming in, those errors are converted to a differential error through element or ratio mismatch.

9.2 Functional Block Diagram

THS4541-Q1 fbd_los375.gif

9.3 Feature Description

9.3.1 Differential I/O

The THS4541-Q1 combines a core differential I/O, high-gain block with an output common-mode sense that is compared to a reference voltage and then fed back into the main amplifier block to control the average output to that reference. The differential I/O block is a classic, high open-loop gain stage with a dominant pole at approximately 900 Hz. This voltage feedback structure projects a single-pole, unity-gain Aol at 850 MHz (gain bandwidth product). The high-speed differential outputs include an internal averaging resistor network to sense the output common-mode voltage. This voltage is compared by a separate Vcm error amplifier to the voltage on the Vocm pin. If floated, this reference is at half the total supply voltage across the device using two 100-kΩ resistors. This Vcm error amplifier transmits a correction signal into the main amplifier to force the output average voltage to meet the target voltage on the Vocm pin. The bandwidth of this error amplifier is approximately the same bandwidth as the main differential I/O amplifier.

The differential outputs are collector outputs to obtain the rail-to-rail output swing. These outputs are relatively high-impedance, open-loop sources; however, closing the loop provides a very low output impedance for load driving. No output current limit or thermal shutdown features are provided in this lower-power device. The differential inputs are PNP inputs to provide a negative-rail input range.

To operate the THS4541-Q1, connect external resistors from the FB– pin to the IN+ pins, and the FB+ pin to the IN– pins. Bring in the inputs through additional resistors to the IN+ and IN– pins. The differential I/O op amp operates similarly to an inverting op amp structure where the source must drive the input resistor and the gain is the ratio of the feedback to the input resistor.

9.3.2 Power-Down Control Pin (PD)

The THS4541-Q1 includes a power-down control pin, PD. This pin must be asserted high for correct amplifier operation. The PD pin cannot be floated because there is no internal pullup or pulldown resistor on this pin to reduce disabled power consumption. Asserting this pin low (within 0.7 V of the negative supply) puts the THS4541-Q1 into a very low quiescent state (approximately 2 µA). Switches in the default Vocm resistor string open to eliminate the fixed bias current (25 µA) across the supply in this 200-kΩ voltage divider to midsupply.

9.3.2.1 Operating the Power Shutdown Feature

Assert this CMOS input pin to the desired voltage for operation. For applications that require the device to only be powered on when the supplies are present, tie the PD pin to the positive supply voltage.

When the PD pin is somewhat below the positive supply pin, slightly more quiescent current is drawn; see Figure 56. For the minimum-on power, assert this pin to the positive supply.

The disable operation is referenced from the negative supply; normally, ground. For split-supply operation, with the negative supply below ground, a disable control voltage below ground is required to turn the THS4541-Q1 off when the negative supply exceeds –0.7 V.

For single-supply operation, a minimum of 1.7 V above the negative supply (ground, in this case) is required to assure operation. This minimum logic-high level allows for direct operation from 1.8-V supply logic.

9.3.3 Input Overdrive Operation

The THS4541-Q1 input stage architecture is intrinsically robust to input overdrives with the series input resistor required by all applications. High input overdrives cause the outputs to limit into their maximum swings with the remaining input current through the Rg resistors absorbed by internal, back-to-back protection diodes across the two inputs. These diodes are normally off in application, and only turn on to absorb the currents that a large input overdrive might produce through the source impedance and or the series Rg elements required by all designs. Figure 12 and Figure 30 illustrate the exceptional output limiting and short recovery time for an input overdrive that is attempting to drive the outputs to two times the available swing.

The internal input diodes can safely absorb up to ±15 mA in an overdrive condition. For designs that require more current to be absorbed, consider adding an external protection diode such as the BAV99 device used in the example ADC interface design of Figure 80.

9.4 Device Functional Modes

This wideband FDA requires external resistors for correct signal-path operation. When configured for the desired input impedance and gain setting with these external resistors, the amplifier can be either on with the PD pin asserted to a voltage greater than (Vs–) + 1.7 V, or turned off by asserting PD low. Disabling the amplifier shuts off the quiescent current and stops correct amplifier operation. The signal path is still present for the source signal through the external resistors.

The Vocm control pin sets the output average voltage. Left open, Vocm defaults to an internal midsupply value. Driving this high-impedance input with a voltage reference within its valid range sets a target for the internal Vcm error amplifier.

9.4.1 Operation from Single-Ended Sources to Differential Outputs

One of the most useful features supported by the FDA device is an easy conversion from a single-ended input to a differential output centered on a user-controlled, common-mode level. While the output side is relatively straightforward, the device input pins move in a common-mode sense with the input signal. This common-mode voltage at the input pins moving with the input signal acts to increase the apparent input impedance to be greater than the Rg value. This input active impedance issue applies to both AC- and DC-coupled designs, and requires somewhat more complex solutions for the resistors to account for this active impedance, as shown in the following subsections.

9.4.1.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion

When the signal path can be AC coupled, the DC biasing for the THS4541-Q1 becomes a relatively simple task. In all designs, start by defining the output common-mode voltage. The AC-coupling issue can be separated for the input and output sides of an FDA design. The input can be AC coupled and the output DC coupled, or the output can be AC coupled and the input DC coupled, or they can both be AC coupled. One situation where the output might be DC coupled (for an AC-coupled input), is when driving directly into an ADC where the Vocm control voltage uses the ADC common-mode reference to directly bias the FDA output common-mode to the required ADC input common-mode. In any case, the design starts by setting the desired Vocm. When an AC-coupled path follows the output pins, the best linearity is achieved by operating Vocm at midsupply. The Vocm voltage must be within the linear range for the common-mode loop, as specified in the headroom specifications (approximately 0.91 V greater than the negative supply and 1.1 V less than the positive supply). If the output path is also AC coupled, simply letting the Vocm control pin float is usually preferred in order to get a midsupply default Vocm bias with minimal elements. To limit noise, place a 0.1-µF decoupling capacitor on the Vocm pin to ground.

After Vocm is defined, check the target output voltage swing to ensure that the Vocm plus the positive or negative output swing on each side does not clip into the supplies. If the desired output differential swing is defined as Vopp, divide by 4 to obtain the ±Vp swing around Vocm at each of the two output pins (each pin operates 180° out of phase with the other). Check that Vocm ±Vp does not exceed the absolute supply rails for this rail-to-rail output (RRO) device.

Going to the device input pins side, because both the source and balancing resistor on the nonsignal input side are DC blocked (see Figure 61), no common-mode current flows from the output common-mode voltage, thus setting the input common-mode equal to the output common-mode voltage.

This input headroom also sets a limit for higher Vocm voltages. Because the input Vicm is the output Vocm for AC-coupled sources, the 1.2-V minimum headroom for the input pins to the positive supply overrides the 1.1-V headroom limit for the output Vocm. Also, the input signal moves this input Vicm around the DC bias point, as described in the Resistor Design Equations for the Single-Ended to Differential Configuration of the FDA section.

9.4.1.2 DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversion

The output considerations remain the same as for the AC-coupled design. Again, the input can be DC coupled while the output is AC coupled. A DC-coupled input with an AC-coupled output might have some advantages to move the input Vicm down if the source is ground referenced. When the source is DC coupled into the THS4541-Q1 (see Figure 63), both sides of the input circuit must be DC coupled to retain differential balance. Normally, the nonsignal input side has an Rg element biased to whatever the source midrange is expected to be. Providing this midscale reference gives a balanced differential swing around Vocm at the outputs. Often, Rg2 is simply grounded for DC-coupled, bipolar-input applications. This configuration gives a balanced differential output if the source is swinging around ground. If the source swings from ground to some positive voltage, grounding Rg2 gives a unipolar output differential swing from both outputs at Vocm (when the input is at ground) to one polarity of swing. Biasing Rg2 to an expected midpoint for the input signal creates a differential output swing around Vocm.

One significant consideration for a DC-coupled input is that Vocm sets up a common-mode bias current from the output back through Rf and Rg to the source on both sides of the feedback. Without input balancing networks, the source must sink or source this DC current. After the input signal range and biasing on the other Rg element is set, check that the voltage divider from Vocm to Vin through Rf and Rg (and possibly Rs) establishes an input Vicm at the device input pins that is in range. If the average source is at ground, the negative rail input stage for the THS4541-Q1 is in range for applications using a single positive supply and a positive output Vocm setting because this DC current lifts the average FDA input summing junctions up off of ground to a positive voltage (the average of the V+ and V– input pin voltages on the FDA).

9.4.1.3 Resistor Design Equations for the Single-Ended to Differential Configuration of the FDA

The design equations for setting the resistors around an FDA to convert from a single-ended input signal to differential output can be approached from several directions. Here, several critical assumptions are made to simplify the results:

  • The feedback resistors are selected first and set equal on the two sides.
  • The DC and AC impedances from the summing junctions back to the signal source and ground (or a bias voltage on the nonsignal input side) are set equal to retain feedback divider balance on each side of the FDA

Both of these assumptions are typical and aimed to delivering the best dynamic range through the FDA signal path.

After the feedback resistor values are chosen, the aim is to solve for the Rt (a termination resistor to ground on the signal input side), Rg1 (the input gain resistor for the signal path), and Rg2 (the matching gain resistor on the nonsignal input side); see Figure 61 and Figure 63. The same resistor solutions can be applied to either AC- or DC-coupled paths. Adding blocking capacitors in the input-signal chain is a simple option. Adding these blocking capacitors after the Rt element (as shown in Figure 61) has the advantage of removing any DC currents in the feedback path from the output Vocm to ground.

Earlier approaches to the solutions for Rt and Rg1 (when the input must be matched to a source impedance, Rs) follow an iterative approach. This complexity arises from the active input impedance at the Rg1 input. When the FDA is used to convert a single-ended signal to differential, the common-mode input voltage at the FDA inputs must move with the input signal to generate the inverted output signal as a current in the Rg2 element. A more recent solution is shown as Equation 7, where a quadratic in Rt can be solved for an exact required value. This quadratic emerges from the simultaneous solution for a matched input impedance and target gain. The only inputs required are:

  1. The selected Rf value.
  2. The target voltage gain (Av) from the input of Rt to the differential output voltage.
  3. The desired input impedance at the junction of Rt and Rg1 to match Rs.

Solving this quadratic for Rt starts the solution sequence, as shown in Equation 7.

Equation 7. THS4541-Q1 q_r2t_los375.gif

Being a quadratic, there are limits to the range of solutions. Specifically, after Rf and Rs are chosen, there is physically a maximum gain beyond which Equation 7 starts to solve for negative Rt values (if input matching is a requirement). With Rf selected, use Equation 8 to verify that the maximum gain is greater than the desired gain.

Equation 8. THS4541-Q1 q_avmax_los375.gif

If the achievable Avmax is less than desired, increase the Rf value. After Rt is derived from Equation 7, the Rg1 element is given by Equation 9:

Equation 9. THS4541-Q1 q_rg1_los375.gif

Then, the simplest approach is to use a single Rg2 = Rt || Rs + Rg1 on the nonsignal input side. Often, this approach is shown as the separate Rg1 and Rs elements. Using these separate elements provides a better divider match on the two feedback paths, but a single Rg2 is often acceptable. A direct solution for Rg2 is given as Equation 10:

Equation 10. THS4541-Q1 q_rg2_los375.gif

This design proceeds from a target input impedance matched to Rs, signal gain Av from the matched input to the differential output voltage, and a selected Rf value. The nominal Rf value chosen for the THS4541-Q1 characterization is 402 Ω. As discussed previously, going lower improves noise and phase margin, but reduces the total output load impedance possibly degrading harmonic distortion. Going higher increases the output noise, and might reduce the loop-phase margin because of the feedback pole to the input capacitance, but reduces the total loading on the outputs. Using Equation 8 to Equation 10 to sweep the target gain from 1 to Avmax < 14.3 V/V gives Table 6, which shows exact values for Rt, Rg1, and Rg2, where a 50-Ω source must be matched while setting the two feedback resistors to 402 Ω. One possible solution for 1% standard values is shown, and the resulting actual input impedance and gain with % errors to the targets are also shown in Table 6.

Table 6. Required Resistors for a Single-Ended to Differential FDA Design Stepping Gain from
1 V/V to 14 V/V(1)

Av Rt, EXACT (Ω) Rt 1% Rg1, EXACT (Ω) Rg1 1% Rg2, EXACT (Ω) Rg2 1% ACTUAL ZIN %ERR TO Rs ACTUAL GAIN %ERR TO Av
1 55.2 54.9 395 392 421 422 49.731 –0.54% 1.006 0.62%
2 60.1 60.4 193 191 220 221 50.171 0.34% 2.014 0.72%
3 65.6 64.9 123 124 151 150 49.572 –0.86% 2.983 –0.57%
4 72.0 71.5 88.9 88.7 118 118 49.704 –0.59% 4.005 0.14%
5 79.7 80.6 68.4 68.1 99.2 100 50.451 0.90% 5.014 0.28%
6 89.1 88.7 53.7 53.6 85.7 86.6 49.909 –0.18% 6.008 0.14%
7 101 102 43.5 43.2 77.1 76.8 50.179 0.36% 7.029 0.42%
8 117 118 35.5 35.7 70.6 69.8 50.246 0.49% 7.974 –0.32%
9 138 137 28.8 28.7 65.4 64.9 49.605 –0.79% 9.016 0.18%
10 170 169 23.5 23.7 62.0 61.9 50.009 0.02% 9.961 –0.39%
11 220 221 18.8 18.7 59.6 59.0 49.815 –0.37% 11.024 0.22%
12 313 316 14.7 14.7 57.9 57.6 50.051 0.10% 11.995 –0.04%
13 545 549 10.9 11.0 56.7 56.2 49.926 –0.15% 12.967 –0.25%
14 2209 2210 7.26 7.32 56.2 56.2 50.079 0.16% 13.986 –0.10%
(1) Rf = 402 Ω, Rs = 50 Ω, and AvMAX = 14.32 V/V.

These equations and design flow apply to any FDA. Using the feedback resistor value as a starting point is particularly useful for current-feedback-based FDAs such as the LMH6554, where the value of these feedback resistors determines the frequency response flatness. Similar tables can be built using the equations provided here for other source impedances, Rf values, and gain ranges.

Note the extremely low Rg1 values at the higher gains. For instance, at a gain of 14 V/V, that 7.32-Ω standard value is transformed by the action of the common-mode loop moving the input common-mode voltage to appear like a 50-Ω input match. This active input impedance provides an improved input-referred noise at higher gains; see the Noise Analysis section. The TINA model correctly shows this actively-set input impedance in the single-ended to differential configuration, and is a good tool to validate the gains, input impedances, response shapes, and noise issues.

9.4.1.4 Input Impedance for the Single-Ended to Differential FDA Configuration

The designs so far have included a source impedance, Rs, that must be matched by Rt and Rg1. The total impedance at the junction of Rt and Rg1 for the circuit of Figure 63 is the parallel combination of Rt to ground, and the ZA (active impedance) presented by Rg1. The expression for ZA, assuming Rg2 is set to obtain the differential divider balance, is given by Equation 11:

Equation 11. THS4541-Q1 q_za1_los375.gif

For designs that do not need impedance matching, but instead come from the low impedance output of another amplifier for instance, Rg1 = Rg2 is the single-to-differential design used without an Rt to ground. Setting Rg1 = Rg2 = Rg in Equation 11 gives the input impedance of a simple input FDA driving from a low-impedance, single-ended source to a differential output as shown in Equation 12:

Equation 12. THS4541-Q1 q_za2_los375.gif

In this case, setting a target gain as Rf / Rg ≡ α, and then setting the desired input impedance, allows the Rg element to be resolved first, and then the required Rf to get the gain. For example, targeting an input impedance of 200 Ω with a gain of 4 V/V, Equation 13 gives the physical Rg element. Multiplying this required Rg value by a gain of 4 gives the Rf value and the design of Figure 72.

Equation 13. THS4541-Q1 q_rg_los375.gif
THS4541-Q1 dc_coupled_200_los375.gif Figure 72. 200-Ω Input Impedance, Single-Ended to Differential DC-Coupled Design with Gain of 4 V/V

After being designed, this circuit can also be AC coupled by adding blocking caps in series with the two 120-Ω Rg resistors. This active input impedance has the advantage of increasing the apparent load to the prior stage using lower resistors values, leading to lower output noise for a given gain target.

9.4.2 Differential-Input to Differential-Output Operation

In many ways, this method is a much simpler way to operate the FDA from a design equations perspective. Again, assuming the two sides of the circuit are balanced with equal Rf and Rg elements, the differential input impedance is now just the sum of the two Rg elements to a differential inverting summing junction. In these designs, the input common-mode voltage at the summing junctions does not move with the signal, but must be DC biased in the allowable range for the input pins with consideration given to the voltage headroom required from each supply. Slightly different considerations apply to AC- or DC-coupled, differential-in to differential-out designs, as described in the following sections.

9.4.2.1 AC-Coupled, Differential-Input to Differential-Output Design Issues

There are two typical ways to use the THS4541-Q1 with an AC-coupled differential source. In the first method, the source is differential and can be coupled in through two blocking capacitors. The second method uses either a single-ended or a differential source and couples in through a transformer (or balun). Figure 73 shows a typical blocking capacitor approach to a differential input. An optional input differential termination resistor (Rm) is included in this design. This Rm element allows the input Rg resistors to be scaled up while still delivering lower differential input impedance to the source. In this example, the Rg elements sum to show a 200-Ω differential impedance, while the Rm element combines in parallel to give a net 100-Ω, AC-coupled, differential impedance to the source. Again, the design proceeds ideally by selecting the Rf element values, then the Rg to set the differential gain, then an Rm element (if needed) to achieve a target input impedance. Alternatively, the Rm element can be eliminated, the Rg elements set to the desired input impedance, and Rf set to the get the differential gain (= Rf / Rg).

THS4541-Q1 example_downconvert_los375.gif Figure 73. Example Down-Converting Mixer Delivering an AC-Coupled Differential Signal to the THS4541-Q1

The DC biasing here is very simple. The output Vocm is set by the input control voltage and, because there is no DC current path for the output common-mode voltage, that DC bias also sets the input pins common-mode operating points.

Transformer input coupling allows either a single-ended or differential source to be coupled into the THS4541-Q1; possibly also improving the input-referred noise figure. These designs assume a source impedance that must be matched in the balun interface. The simplest approach is shown in Figure 74, where an example 1:2 turns ratio step-up transformer is used from a 50-Ω source.

THS4541-Q1 input_balun_int_los375.gif Figure 74. Input Balun Interface Delivers a Differential Input to the THS4541-Q1

In this example, this 1:2 turns ratio step-up transformer provides a source and load match from the 50-Ω source if the secondary is terminated in 200 Ω (turns-ratio squared is the impedance ratio across a balun). The two Rg elements provide that termination as they sum to the differential virtual ground at the FDA summing junctions. The input blocking cap (C1) is optional and included only to eliminate DC shorts to ground from the source. This solution often improves the input-referred noise figure more so than just the FDA using this passive (zero power dissipation) input balun. Defining a few ratios allows a noise figure expression to be written as Equation 14:

Equation 14. THS4541-Q1 q_nf_los375.gif

where

  • n ≡ turns ratio (the ohms ratio is then n2)
  • α ≡ differential gain in the FDA = Rf / Rg
  • β ≡ transformer insertion loss in V/V (from a dB insertion loss, convert to linear attenuation = β)
  • kT = 4e-21J at 290 K (17°C)

One way to use Equation 14 is to fix the input balun selection, and then sweep the FDA gain by stepping up the Rf value. The lowest-noise method uses just the two Rg elements for termination matching (no Rm element, such as in Figure 74) and sweep the Rf values up to assess the resulting input-referred noise figure. While this method can be used with all FDAs and a wide range of input baluns, relatively low-frequency input baluns are an appropriate choice here because the THS4541-Q1 holds exceptional SFDR for less than 40-MHz applications. Two representative selections, with their typical measured spans and resulting model elements, are shown in Table 7. For these two selections, the critical inputs for the noise figures are the turns ratio and the insertion loss (the 0.2 dB for the CX2014LNL becomes a β = 0.977 in the NF expression).

Table 7. Example Input Step-Up Baluns and Associated Parameters

PART NUMBER Rs (Ω) –1-dB FREQUENCY (MHz) INSERTION LOSS (dB) MFR NO. OF DECADES –3-dB FREQUENCY (MHz) TURNS RATIO MODEL ELEMENTS
MIN MAX –1-dB POINTS –3-dB POINTS MIN MAX L1 (µH) L2 (µH) k M (µH)
ADT2-1T 50 0.1 463 0.3 MiniCircuits 3.67 4.22 0.05 825 1.41 79.57747 158.50797 0.99988 112.19064
CX2047LNL 50 0.083 270 0.2 Pulse Eng 3.51 3.93 0.044 372 2 90.42894 361.71578 0.99976 180.81512

Using the typical input referred noise terms for the THS4541-Q1 (eni = 2.2 nV and in = 1.9 pA) and sweeping the total gain from the input of the balun to the differential output over a 10-dB to 24-dB span, gives the input noise figure shown in Figure 75.

THS4541-Q1 D061_SLOS375.gif Figure 75. Noise Figure versus Total Gain with the Two Input Baluns of Table 7

The 50-Ω referred noise figure estimates show a decreasing input-referred noise for either balun as the gain increases through 24 dB. The only elements changing in these sweeps are the feedback-resistor values, in order to achieve the total target gain after the step up from the input balun. The example of Figure 74 is a gain of
7.86 V/V, or a 17.9-dB gain where a 9.0-dB input noise figure is predicted from Figure 75. Another advantage for this method is that the effective noise gain (NG) is reduced by the source impedance appearing as part of the total Rg element in the design. The example of Figure 74 operates with a NG = 1 + 402 / (100 + 100) = 3 V/V, giving greater than 300-MHz SSBW in the THS4541-Q1 portion of the design. Combining that with the 372 MHz in the balun itself gives greater than 200 MHz in this 18-dB gain stage; or an equivalent greater than 1.6-GHz gain bandwidth product in a low-power, high dynamic range interface.

Added features and considerations for the balun input of Figure 74 include:

  • Many of these baluns offer a secondary centertap. Leave the centertap unconnected for the best HD2 suppression and DC biasing (do not include a capacitor from this centertap to ground).
  • With a floating secondary centertap, the input pins common-mode voltage again equals the output Vocm setting because there is no DC path for the output common-mode voltage to create a common-mode current (ICM).

9.4.2.2 DC-Coupled, Differential-Input to Differential-Output Design Issues

Operating the THS4541-Q1 with a DC-coupled differential input source is very simple and only requires that the input pins stay in range of the DC common-mode operating voltage. One example is a DC-to-50-MHz quadrature down-converter output. These outputs typically sit on a DC level with some internal source impedance to the external loads. The example of Figure 76 shows a design using the THS4541-Q1 with a simple, passive RLC filter to the inputs (the Rg elements act as the differential termination for the filter design). From the original source behind the internal 250-Ω outputs, this circuit is a gain of 1 to the THS4541-Q1 output pins. The DC common-mode operating voltage level shifts from the 1.2-V internal, to the mixer, to an output at the ADC Vcm voltage of 0.95 V. In this case, a simple average of the two DC voltages in the gain of 1 stage gives a 1.08-V input pin common-mode result that is well within range.

THS4541-Q1 example_dc_coupled_los375.gif Figure 76. Example DC-Coupled, Differential I/O Design from a Quadrature Mixer to an ADC