The TCA9548A-Q1 device has eight bidirectional translating switches that can be controlled through the I2C bus. The SCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individual SCn/SDn channel or combination of channels can be selected, determined by the contents of the programmable control register. These downstream channels can be used to resolve I2C slave address conflicts. For example, if eight identical digital temperature sensors are needed in the application, one sensor can be connected at each channel: 0-7.
The system master can reset the TCA9548A-Q1 in the event of a time-out or other improper operation by asserting a low in the RESET input. Similarly, the power-on reset deselects all channels and initializes the I2C/SMBus state machine. Asserting RESET causes the same reset and initialization to occur without powering down the part. This allows recovery should one of the downstream I2C buses get stuck in a low state.
The pass gates of the switches are constructed so that the VCC pin can be used to limit the maximum high voltage, which is passed by the TCA9548A-Q1. Limiting the maximum high voltage allows the use of different bus voltages on each pair, so that 1.8-V, 2.5-V or 3.3-V parts can communicate with 5-V parts, without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5-V tolerant.
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|Part number||立即下单||Channels (#)||VCC (Min) (V)||VCC (Max) (V)||Frequency (Max) (kHz)||Addresses||Features||Operating temperature range (C)||Package Group|
||8||1.65||5.25||400||8||Reset Pin||-40 to 85||VQFN | 24|
|-40 to 85||
SOIC | 14
TSSOP | 14
||4||1.65||5.5||400||8||Interrupt Pin||-40 to 85||TSSOP | 20|
||4||1.65||5.5||400||8||Reset Pin||-40 to 85||
SOIC | 16
TSSOP | 16
||8||1.65||5.5||400||8||Reset Pin||-40 to 85||
TSSOP | 24
VQFN | 24