TAS6424-Q1 75W、2MHz 数字输入、4 通道汽车用 D 类音频放大器，具有负载突降保护和 I2C 诊断功能 (Rev. A)
ZHCSFK8A – September2016 – revisedOctober 2016
12.1 Layout Guidelines
The pinout of the TAS6424-Q1 was selected to provide flowthrough layout with all high-power connections on the right side, and all low-power signals and supply decoupling on the left side.
The TAS6424-Q1 EVM uses a four-layer PCB. The copper thickness was selected as 70 µm to optimize power loss.
The small value of the output filter provides a small size and, in this case, the low height of the inductor enables double-sided mounting.
The EVM PCB shown in Figure 85 is the basis for the layout guidelines.
12.1.1 Electrical Connection of Thermal pad and Heat Sink
For the DKQ package, the heat sink connected to the thermal pad of the device should be connected to GND. The heat slug must not be connected to any other electrical node.
12.1.2 EMI Considerations
Automotive-level EMI performance depends on both careful integrated circuit design and good system-level design. Controlling sources of electromagnetic interference (EMI) was a major consideration in all aspects of the design. The design has minimal parasitic inductances because of the short leads on the package which reduces the EMI that results from current passing from the die to the system PCB. Each channel also operates at a different phase. The design also incorporates circuitry that optimizes output transitions that cause EMI.
For optimizing the EMI a solid ground layer plane is recommended, for a PCB design the fulfills the CISPR25 level 5 requirements, see the TAS6424-Q1 EVM layout.
12.1.3 General Guidelines
The EVM layout is optimized for low noise and EMC performance.
The TAS6424-Q1 has an exposed thermal pad that is up, away from the PCB. The layout must consider an external heat sink.
Refer to Figure 85 for the following guidelines:
- A ground plane, A, on the same side as the device pins helps reduce EMI by providing a very-low loop impedance for the high-frequency switching current.
- The decoupling capacitors on PVDD, B, are very close to the device with the ground return close to the ground pins.
- The ground connections for the capacitors in the LC filter, C, have a direct path back to the device and also the ground return for each channel is the shared. This direct path allows for improved common mode EMI rejection.
- The traces from the output pins to the inductors, D, should have the shortest trace possible to allow for the smallest loop of large switching currents.
- Heat-sink mounting screws, E, should be close to the device to keep the loop short from the package to ground.
- Many vias, F, stitching together the ground planes can create a shield to isolate the amplifier and power supply.
12.2 Layout Example
12.3 Thermal Considerations
The thermally enhanced PowerPAD package has an exposed pad up for connection to a heat sink. The output power of any amplifier is determined by the thermal performance of the amplifier as well as limitations placed on it by the system, such as the ambient operating temperature. The heat sink absorbs heat from the TAS6424-Q1 and transfers it to the air. With proper thermal management this process can reach equilibrium and heat can be continually transferred from the device. Heat sinks can be smaller than that of classic linear amplifier design because of the excellent efficiency of class-D amplifiers. This device is intended for use with a heat sink, therefore, RθJC will be used as the thermal resistance from junction to the exposed metal package. This resistance will dominate the thermal management, so other thermal transfers will not be considered. The thermal resistance of RθJA (junction to ambient) is required to determine the full thermal solution. The thermal resistance is comprised of the following components:
- RθJC of the TAS6424-Q1
- Thermal resistance of the thermal interface material
- Thermal resistance of the heat sink
The thermal resistance of the thermal interface material can be determined from the manufacturer’s value for the area thermal resistance (expressed in °C-mm2/W) and the area of the exposed metal package. For example, a typical, white, thermal grease with a 0.0254-mm (0.001-inch) thick layer is approximately 4.52°C-mm2/W. The TAS6424-Q1 in the DKQ package has an exposed area of 47.6 mm2. By dividing the area thermal resistance by the exposed metal area determines the thermal resistance for the thermal grease. The thermal resistance of the thermal grease is 0.094°C/W
Table 41 lists the modeling parameters for one device on a heat sink. The junction temperature is assumed to be 115°C while delivering and average power of 10 watts per channel into a 4-Ω load. The thermal-grease example previously described is used for the thermal interface material. Use Equation 1 to design the thermal system.
Table 41. Thermal Modeling
|Average Power to load||40W (4x 10w)|
|Power dissipation||8W (4x 2w)|
|ΔT inside package||5.6°C (0.7°C/W × 8W)|
|ΔT through thermal interface material||0.75°C (0.094°C/W × 8W)|
|Required heat sink thermal resistance||10.45°C/W ([115°C – 25°C – 5.6°C – 0.75°C] / 8W)|
|System thermal resistance to ambient RθJA||11.24°C/W|
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