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Technology family AS Number of channels 1 Operating temperature range (°C) 0 to 70 Rating Catalog Supply current (max) (µA) 20000
Technology family AS Number of channels 1 Operating temperature range (°C) 0 to 70 Rating Catalog Supply current (max) (µA) 20000
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6 SOP (NS) 16 79.56 mm² 10.2 x 7.8
  • Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems
  • Incorporate Three Enable Inputs to Simplify Cascading and/or Data Reception
  • Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
  • Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems
  • Incorporate Three Enable Inputs to Simplify Cascading and/or Data Reception
  • Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

The ´ALS138A and ´AS138 are 3-line to 8-line decoders/demultiplexers designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance systems, these devices can be used to minimize the effects of system decoding. When employed with high-speed memories with a fast enable circuit, the delay times of the decoder and the enable time of the memory are usually less than the typical access time of the memory. The effective system delay introduced by the Schottky-clamped system decoder is negligible.

The conditions at the binary-select (A, B, and C) inputs and the three enable (G1, , and ) inputs select one of eight output lines. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications.

The SN54ALS138A and SN54AS138 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS138A and SN74AS138 are characterized for operation from 0°C to 70°C.

 

 

The ´ALS138A and ´AS138 are 3-line to 8-line decoders/demultiplexers designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance systems, these devices can be used to minimize the effects of system decoding. When employed with high-speed memories with a fast enable circuit, the delay times of the decoder and the enable time of the memory are usually less than the typical access time of the memory. The effective system delay introduced by the Schottky-clamped system decoder is negligible.

The conditions at the binary-select (A, B, and C) inputs and the three enable (G1, , and ) inputs select one of eight output lines. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications.

The SN54ALS138A and SN54AS138 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS138A and SN74AS138 are characterized for operation from 0°C to 70°C.

 

 

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* 数据表 3-Line To 8-Line Decoders/Demultiplexers 数据表 (Rev. E) 1996年 7月 1日
选择指南 Logic Guide (Rev. AB) 2017年 6月 12日
应用手册 Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
选择指南 逻辑器件指南 2014 (Rev. AA) 最新英语版本 (Rev.AB) 2014年 11月 17日
用户指南 LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
应用手册 Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
应用手册 TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
应用手册 使用逻辑器件进行设计 (Rev. C) 1997年 6月 1日
应用手册 Advanced Schottky Load Management 1997年 2月 1日
应用手册 Input and Output Characteristics of Digital Integrated Circuits 1996年 10月 1日
应用手册 Live Insertion 1996年 10月 1日
应用手册 Advanced Schottky (ALS and AS) Logic Families 1995年 8月 1日

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用户指南: PDF | HTML
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PDIP (N) 16 查看选项
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SOP (NS) 16 查看选项

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