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LVDS、M-LVDS 和 PECL IC

SN65MLVD129

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双通道 1:4 LVTTL 到 M-LVDS 中继器

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数据表

SN65MLVD129

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数据表 立即订购

产品详情

Function Driver, Repeater, Translator Protocols M-LVDS Number of transmitters 8 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (MBits) 250 Input signal LVTTL Output signal M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Driver, Repeater, Translator Protocols M-LVDS Number of transmitters 8 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (MBits) 250 Input signal LVTTL Output signal M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
TSSOP (DGG) 48 101.25 mm² 12.5 x 8.1
  • LVTTL Receiver and Eight Line Drivers Configured as an 8-Port M-LVDS Repeater—SN65MLVD128
  • 2 LVTTL Receivers and Eight Line Drivers Configured as Dual 4-Port M-LVDS Repeaters—SN65MLVD129
  • Drivers Meet or Exceed the M-LVDS Standard (TIA/EIA-899)
  • Low-Voltage Differential 30- Line Drivers for Data Rates¹ Up to 250 Mbps or Clock Frequencies Up to 125 MHz
  • Power Up/Down Glitch Free
  • Controlled Driver Output Voltage Transition Times for Improved Signal Quality
  • Bus Pins High Impedance When Disabled or VCC ≤ 1.5 V
  • Independent Enables for each Driver
  • Output-to-Ouput Skew tsk(o) ≤ 160 ps
       Part-to-Part Skew tsk(pp) ≤ 800 ps
  • Single 3.3-V Voltage Supply
  • Bus Pin ESD Protection Exceeds 9 kV
  • Packaged in 48-Pin TSSOP (DGG)
  • APPLICATIONS
    • AdvancedTCA™ (ATCA™) Clock Bus Driver
    • Clock Distribution
    • Data and Clock Repeating Over Backplanes and Cables
    • Cellular Base Stations
    • Central Office Switches
    • Network Switches and Routers

¹The data rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second).
AdvancedTCA and ATCA are trademarks of the PCI Industrial Computer Manufacturers Group.
  • LVTTL Receiver and Eight Line Drivers Configured as an 8-Port M-LVDS Repeater—SN65MLVD128
  • 2 LVTTL Receivers and Eight Line Drivers Configured as Dual 4-Port M-LVDS Repeaters—SN65MLVD129
  • Drivers Meet or Exceed the M-LVDS Standard (TIA/EIA-899)
  • Low-Voltage Differential 30- Line Drivers for Data Rates¹ Up to 250 Mbps or Clock Frequencies Up to 125 MHz
  • Power Up/Down Glitch Free
  • Controlled Driver Output Voltage Transition Times for Improved Signal Quality
  • Bus Pins High Impedance When Disabled or VCC ≤ 1.5 V
  • Independent Enables for each Driver
  • Output-to-Ouput Skew tsk(o) ≤ 160 ps
       Part-to-Part Skew tsk(pp) ≤ 800 ps
  • Single 3.3-V Voltage Supply
  • Bus Pin ESD Protection Exceeds 9 kV
  • Packaged in 48-Pin TSSOP (DGG)
  • APPLICATIONS
    • AdvancedTCA™ (ATCA™) Clock Bus Driver
    • Clock Distribution
    • Data and Clock Repeating Over Backplanes and Cables
    • Cellular Base Stations
    • Central Office Switches
    • Network Switches and Routers

¹The data rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second).
AdvancedTCA and ATCA are trademarks of the PCI Industrial Computer Manufacturers Group.

The SN65MLVD128 and SN65MLVD129 are LVTTL-to-M.LVDS translators/repeaters. Outputs comply with the M.LVDS standard (TIA/EIA-899) and are optimized for data rates up to 250 Mbps, and clock frequencies up to 125 MHz. The driver outputs have been designed to support multipoint buses presenting loads as low as 30 and incorporates controlled transition times for backbone operation.

M-LVDS compliant devices allow for 32 nodes on a common bus, providing a high-speed replacement for RS-485 devices when lower common-mode voltage range and lower output signaling levels are acceptable. The SN65MLVD128 and SN65MLVD129 provide separate driver enables, allowing for independent control of each output signal.

Intended applications for these devices include transmission of clock signals from a central clock module, as well as translation and buffering of data or control signals for transmission through a controlled impedance backplane or cable.

The SN65MLVD128 and SN65MLVD129 are LVTTL-to-M.LVDS translators/repeaters. Outputs comply with the M.LVDS standard (TIA/EIA-899) and are optimized for data rates up to 250 Mbps, and clock frequencies up to 125 MHz. The driver outputs have been designed to support multipoint buses presenting loads as low as 30 and incorporates controlled transition times for backbone operation.

M-LVDS compliant devices allow for 32 nodes on a common bus, providing a high-speed replacement for RS-485 devices when lower common-mode voltage range and lower output signaling levels are acceptable. The SN65MLVD128 and SN65MLVD129 provide separate driver enables, allowing for independent control of each output signal.

Intended applications for these devices include transmission of clock signals from a central clock module, as well as translation and buffering of data or control signals for transmission through a controlled impedance backplane or cable.
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技术文档

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类型 标题 下载最新的英语版本 日期
* 数据表 SN65MLVD128/129 - 1:8 LVTTL to M-LVDS Repeater, Dual 1:4 LVTTL to M-LVDS Repeate 数据表 2003年 9月 4日
应用手册 AN-1926：M-LVDS 简介及其时钟和数据分配应用 (Rev. C) PDF | HTML 英语版 (Rev.C) PDF | HTML 2023年 7月 5日
应用简报 How Far, How Fast Can You Operate MLVDS? 2018年 8月 6日
应用手册 SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) 2001年 11月 20日

设计和开发

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仿真模型

SN65MLVD129 IBIS Model

SLLC207.ZIP (8 KB) - IBIS Model
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英语版 (Rev.A): PDF
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订购和质量

包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
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  • 制造厂地点
  • 封装厂地点

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