主页 接口 LVDS、M-LVDS 和 PECL IC
主页
接口
LVDS、M-LVDS 和 PECL IC

SN65LVDS20

正在供货

4Gbps PECL 至 LVDS 转换器

立即订购
数据表

SN65LVDS20

正在供货
数据表 立即订购

产品详情

Function Repeater, Translator Protocols LVDS, LVPECL Number of transmitters 1 Number of receivers 1 Supply voltage (V) 2.5, 3.3 Signaling rate (MBits) 4000 Input signal Differential Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Repeater, Translator Protocols LVDS, LVPECL Number of transmitters 1 Number of receivers 1 Supply voltage (V) 2.5, 3.3 Signaling rate (MBits) 4000 Input signal Differential Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
WSON (DRF) 8 4 mm² 2 x 2
  • Low-Voltage PECL Input and Low-Voltage PECL or LVDS Outputs
  • Signaling Rates to 4 Gbps or Clock Rates to 2 GHz
    • 120-ps Output Transition Times
    • Less than 45 ps Total Jitter
    • Less than 630 ps Propagation Delay Times
  • 2.5-V or 3.3-V Supply Operation
  • 2-mm x 2-mm Small-Outline No-Lead Package
  • APPLICATIONS
    • PECL-to-LVDS Translation
    • Data or Clock Signal Amplification
  • Low-Voltage PECL Input and Low-Voltage PECL or LVDS Outputs
  • Signaling Rates to 4 Gbps or Clock Rates to 2 GHz
    • 120-ps Output Transition Times
    • Less than 45 ps Total Jitter
    • Less than 630 ps Propagation Delay Times
  • 2.5-V or 3.3-V Supply Operation
  • 2-mm x 2-mm Small-Outline No-Lead Package
  • APPLICATIONS
    • PECL-to-LVDS Translation
    • Data or Clock Signal Amplification

The SN65LVDS20 and SN65LVP20 are a high-speed differential receiver and driver connected as a repeater. The receiver accepts low-voltage positive-emitter-coupled logic (PECL) at signaling rates up to 4 Gbps and repeats it as either an LVDS or PECL output signal. The signal path through the device is differential for low radiated emissions and minimal added jitter.

The outputs of the SN65LVDS20 are LVDS levels as defined by TIA/EIA-644-A. The outputs of the SN65LVDP20 are compatible with low-voltage PECL levels. A low-level input to EN enables the outputs. A high-level input puts the output into a high-impedance state. Both outputs are designed to drive differential transmission lines with nominally 100- characteristic impedance.

Both devices provide a voltage reference (VBB) of typically 1.35 V below VCC for use in receiving single-ended PECL input signals. When not used, VBB should be unconnected or open.

All devices are characterized for operation from -40°C to 85°C.

The SN65LVDS20 and SN65LVP20 are a high-speed differential receiver and driver connected as a repeater. The receiver accepts low-voltage positive-emitter-coupled logic (PECL) at signaling rates up to 4 Gbps and repeats it as either an LVDS or PECL output signal. The signal path through the device is differential for low radiated emissions and minimal added jitter.

The outputs of the SN65LVDS20 are LVDS levels as defined by TIA/EIA-644-A. The outputs of the SN65LVDP20 are compatible with low-voltage PECL levels. A low-level input to EN enables the outputs. A high-level input puts the output into a high-impedance state. Both outputs are designed to drive differential transmission lines with nominally 100- characteristic impedance.

Both devices provide a voltage reference (VBB) of typically 1.35 V below VCC for use in receiving single-ended PECL input signals. When not used, VBB should be unconnected or open.

All devices are characterized for operation from -40°C to 85°C.
open-in-new 查找其他 LVDS、M-LVDS 和 PECL IC
下载 观看带字幕的视频 视频

技术文档

star =有关此产品的 TI 精选热门文档
未找到结果。请清除搜索并重试。
查看全部 5
类型 标题 下载最新的英语版本 日期
* 数据表 LVPECL and LVS Repeater/Translator With Enable 数据表 (Rev. A) 2005年 9月 13日
应用简报 LVDS to Improve EMC in Motor Drives 2018年 9月 27日
应用简报 How Far, How Fast Can You Operate LVDS Drivers and Receivers? 2018年 8月 3日
应用简报 How to Terminate LVDS Connections with DC and AC Coupling 2018年 5月 16日
EVM 用户指南 Translator/Oscillator Buffer EVM (Rev. A) 2004年 9月 17日

设计和开发

如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。

评估板

SN65LVDS20EVM — SN65LVDS20 评估模块

This Evaluation Module (EVM) facilitates the experimental testing of the Texas Instruments SN65LVDS20 Repeater/Translator silicon device.This device accepts low-voltage PECL input levels and Translates them to LVDS output levels as defined by TIA/EIA-644-A standard.

The device operates at rates to (...)

用户指南: PDF
TI.com 上无现货
仿真模型

SN65LVDS20 IBIS Model Version 2.5

SLLC225.ZIP (8 KB) - IBIS Model
下载
仿真模型

SN65LVDS20 IBIS Model Version 3.3

SLLC224.ZIP (8 KB) - IBIS Model
下载
模拟工具

PSPICE-FOR-TI — 适用于 TI 设计和模拟工具的 PSpice®

PSpice® for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence® 的模拟分析引擎。PSpice for TI 可免费使用，包括业内超大的模型库之一，涵盖我们的模拟和电源产品系列以及精选的模拟行为模型。

借助 PSpice for TI 的设计和仿真环境及其内置的模型库，您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案，然后再进行布局和制造，可缩短产品上市时间并降低开发成本。

在 PSpice for TI 设计和仿真工具中，您可以搜索 TI (...)
发送申请
模拟工具

TINA-TI — 基于 SPICE 的模拟仿真程序

TINA-TI 提供了 SPICE 所有的传统直流、瞬态和频域分析以及更多。TINA 具有广泛的后处理功能，允许您按照希望的方式设置结果的格式。虚拟仪器允许您选择输入波形、探针电路节点电压和波形。TINA 的原理图捕获非常直观 - 真正的“快速入门”。

TINA-TI 安装需要大约 500MB。直接安装，如果想卸载也很容易。我们相信您肯定会爱不释手。

TINA 是德州仪器 (TI) 专有的 DesignSoft 产品。该免费版本具有完整的功能，但不支持完整版 TINA 所提供的某些其他功能。

如需获取可用 TINA-TI 模型的完整列表，请参阅：SpiceRack - 完整列表 

需要 HSpice (...)

用户指南: PDF
英语版 (Rev.A): PDF
查看选项
封装 引脚 下载
WSON (DRF) 8 查看选项
应遵守 TI 评估类商品的标准条款与条件。

订购和质量

包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息：
  • 制造厂地点
  • 封装厂地点

推荐产品可能包含与 TI 此产品相关的参数、评估模块或参考设计。

支持和培训

视频