SN65LVDS1

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630Mbps 单路 LVDS 驱动器

产品详情

Function Driver Protocols LVDS Number of transmitters 1 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (MBits) 630 Input signal LVTTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Driver Protocols LVDS Number of transmitters 1 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (MBits) 630 Input signal LVTTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² 4.9 x 6 SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • Meets or Exceeds the ANSI TIA/EIA-644 Standard
  • Designed for Signaling Rates1 up to:
    • 630 Mbps for Drivers
    • 400 Mbps for Receivers
  • Operates From a 2.4-V to 3.6-V Supply
  • Available in SOT-23 and SOIC Packages
  • Bus-Terminal ESD Exceeds 9 kV
  • Low-Voltage Differential Signaling With Typical Output
    Voltages of 350 mV Into a 100-Ω Load
  • Propagation Delay Times
    • 1.7-ns Typical Driver
    • 2.5-ns Typical Receiver
  • Power Dissipation at 200 MHz
    • 25 mW Typical Driver
    • 60 mW Typical Receiver
  • LVDT Receiver Includes Line Termination
  • Low Voltage TTL (LVTTL) Level Driver Input Is 5-V
    Tolerant
  • Driver Is Output High-Impedance with VCC < 1.5 V
  • Receiver Output and Inputs are High-Impedance With
    VCC < 1.5 V
  • Receiver Open-Circuit Fail Safe
  • Differential Input Voltage Threshold Less Than 100 mV
  • Meets or Exceeds the ANSI TIA/EIA-644 Standard
  • Designed for Signaling Rates1 up to:
    • 630 Mbps for Drivers
    • 400 Mbps for Receivers
  • Operates From a 2.4-V to 3.6-V Supply
  • Available in SOT-23 and SOIC Packages
  • Bus-Terminal ESD Exceeds 9 kV
  • Low-Voltage Differential Signaling With Typical Output
    Voltages of 350 mV Into a 100-Ω Load
  • Propagation Delay Times
    • 1.7-ns Typical Driver
    • 2.5-ns Typical Receiver
  • Power Dissipation at 200 MHz
    • 25 mW Typical Driver
    • 60 mW Typical Receiver
  • LVDT Receiver Includes Line Termination
  • Low Voltage TTL (LVTTL) Level Driver Input Is 5-V
    Tolerant
  • Driver Is Output High-Impedance with VCC < 1.5 V
  • Receiver Output and Inputs are High-Impedance With
    VCC < 1.5 V
  • Receiver Open-Circuit Fail Safe
  • Differential Input Voltage Threshold Less Than 100 mV

The SN65LVDS1, SN65LVDS2, and SN65LVDT2 devices are single, low-voltage, differential line drivers and receivers in the small-outline transistor package. The outputs comply with the TIA/EIA-644 standard and provide a minimum differential output voltage magnitude of 247 mV into a 100-Ω load at signaling rates up to 630 Mbps for drivers and 400 Mbps for receivers.

When the SN65LVDS1 device is used with an LVDS receiver (such as the SN65LVDT2) in a point-to-point connection, data or clocking signals can be transmitted over printed-circuit board traces or cables at very high rates with very low electromagnetic emissions and power consumption. The packaging, low power, low EMI, high ESD tolerance, and wide supply voltage range make the device ideal for battery-powered applications.

The SN65LVDS1, SN65LVDS2, and SN65LVDT2 devices are characterized for operation from –40°C to 85°C.

The SN65LVDS1, SN65LVDS2, and SN65LVDT2 devices are single, low-voltage, differential line drivers and receivers in the small-outline transistor package. The outputs comply with the TIA/EIA-644 standard and provide a minimum differential output voltage magnitude of 247 mV into a 100-Ω load at signaling rates up to 630 Mbps for drivers and 400 Mbps for receivers.

When the SN65LVDS1 device is used with an LVDS receiver (such as the SN65LVDT2) in a point-to-point connection, data or clocking signals can be transmitted over printed-circuit board traces or cables at very high rates with very low electromagnetic emissions and power consumption. The packaging, low power, low EMI, high ESD tolerance, and wide supply voltage range make the device ideal for battery-powered applications.

The SN65LVDS1, SN65LVDS2, and SN65LVDT2 devices are characterized for operation from –40°C to 85°C.

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类型 标题 下载最新的英语版本 日期
* 数据表 High-Speed Differential Line Driver/Receivers 数据表 (Rev. L) 2014年 7月 28日
应用简报 How to Use a 3.3-V LVDS Buffer as a Low-Voltage LVDS Driver 2019年 1月 9日
应用简报 How to Support 1.8-V Signals Using a 3.3-V LVDS Driver/Receiver + Level-Shifter 2018年 12月 28日
应用简报 LVDS to Improve EMC in Motor Drives 2018年 9月 27日
应用简报 How Far, How Fast Can You Operate LVDS Drivers and Receivers? 2018年 8月 3日
应用简报 How to Terminate LVDS Connections with DC and AC Coupling 2018年 5月 16日
应用手册 An Overview of LVDS Technology 1998年 10月 5日

设计和开发

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仿真模型

SN65LVDS1 IBIS Model

SLLC020.ZIP (3 KB) - IBIS Model
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用户指南: PDF
英语版 (Rev.A): PDF
封装 引脚 下载
SOIC (D) 8 查看选项
SOT-23 (DBV) 5 查看选项

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  • REACH
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  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
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