SLLS933G November   2008  – January 2015 SN65HVD233-HT

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (Continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Driver Electrical Characteristics
    6. 7.6  Receiver Electrical Characteristics
    7. 7.7  Driver Switching Characteristics
    8. 7.8  Receiver Switching Characteristics
    9. 7.9  Device Switching Characteristics
    10. 7.10 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 ISO 11898 Compliance of SN65HVD23x Family of 3.3-V CAN Transceivers
        1. 9.3.1.1 Differential Signal
          1. 9.3.1.1.1 Common-Mode Signal
        2. 9.3.1.2 Interoperability Of 3.3-V CAN in 5-V CAN Systems
    4. 9.4 Device Functional Modes
      1. 9.4.1 Function Tables
      2. 9.4.2 Equivalent Input and Output Schematic Diagrams
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Diagnostic Loopback
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Slope Control
        2. 10.2.2.2 Standby
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Trademarks
    2. 13.2 Electrostatic Discharge Caution
    3. 13.3 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Pin Configuration and Functions

D, JDJ, and HKJ Packages
8-Pin SOIC, CDIP SB, and CFP
Top View
po_lls933.gif
HKQ Package
8-Pin CFP
Top View
hkq_po_lls933.gif
HKQ as formed or HKJ mounted dead bug.

Pin Functions

PIN TYPE DESCRIPTION
NO. NAME
1 D I CAN Transmit Data input (Low for dominant and HIGH for recessive bus states)
2 GND Power Ground connection
3 VCC Power VCC
4 R O CAN Receive data output
5 LBK I LoopBack (Active high to enable controller loopback mode)
6 CFANL I/O Low level CAN bus line
7 CANH I/O High level CAN bus line
8 Rs I High Speed, Slope control, and standby enable mode input.

Bare Die Information

DIE THICKNESS BACKSIDE FINISH BACKSIDE POTENTIAL BOND PAD
METALLIZATION COMPOSITION
15 mils. Silicon with backgrind GND Al-Si-Cu (0.5%)
bondpad_lls933.gif

Bond Pad Coordinates In Microns - Rev A

DESCRIPTION PAD NUMBER A B C D
D 1 86.40 157.85 203.40 274.85
GND 2 1035.05 69.75 1150.05 184.75
GND 3 1168.15 69.75 1283.15 184.75
VCC 4 1572.05 51.85 1687.05 166.85
VCC 5 1711.95 51.85 1826.95 166.85
R 6 2758.85 237.65 2873.85 352.65
LBK 7 2774.25 1429.985 2889.25 1544.95
CANL 8 1549.90 1544.95 1664.90 1659.95
CANH 9 1351.45 1544.95 1466.45 1659.95
RS 10 83.50 1429.95 198.50 1544.95
pad_lls933.gif