SLES177B April   2006  – August 2015 PCM1808

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Hardware Control
      2. 7.3.2 System Clock
      3. 7.3.3 Synchronization With Digital Audio System
      4. 7.3.4 Power On
      5. 7.3.5 Serial Audio Data Interface
        1. 7.3.5.1 Interface Mode
          1. 7.3.5.1.1 Master Mode
          2. 7.3.5.1.2 Slave Mode
        2. 7.3.5.2 Data Format
        3. 7.3.5.3 Interface Timing
    4. 7.4 Device Functional Modes
      1. 7.4.1 Fade-In and Fade-Out Functions
      2. 7.4.2 Clock-Halt Power-Down and Reset Function
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Control Pins
        2. 8.2.2.2 Master Clock
        3. 8.2.2.3 DSP or Audio Processor
        4. 8.2.2.4 Input Filters
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 VCC, VDD Pins
      2. 10.1.2 AGND, DGND Pins
      3. 10.1.3 VINL, VINR Pins
      4. 10.1.4 VREF Pin
      5. 10.1.5 DOUT Pin
      6. 10.1.6 System Clock
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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5 Pin Configuration and Functions

14-Pin TSSOP
PW Package
Top View
PCM1808 p0032-02.gif

Pin Functions

PIN I/O DESCRIPTION
NAME PIN
AGND 2 — Analog GND
BCK 8 I/O Audio-data bit-clock input or output (1)
DGND 5 — Digital GND
DOUT 9 O Audio-data digital output
FMT 12 I Audio-interface format select (2)
LRCK 7 I/O Audio-data latch-enable input or output (1)
MD0 10 I Audio-interface mode select 0 (2)
MD1 11 I Audio-interface mode select 1 (2)
SCKI 6 I System clock input; 256 fS, 384 fS or 512 fS (3)
VCC 3 — Analog power supply, 5-V
VDD 4 — Digital power supply, 3.3-V
VINL 13 I Analog input, L-channel
VINR 14 I Analog input, R-channel
VREF 1 — Reference-voltage decoupling (= 0.5 VCC)
(1) Schmitt-trigger input with internal pulldown (50-kΩ, typical)
(2) Schmitt-trigger input with internal pulldown (50-kΩ, typical), 5-V tolerant
(3) Schmitt-trigger input, 5-V tolerant