NS16C2752
- Dual Independent UART
- Up to 5 Mbits/s Data Transfer Rate
- 2.97 V to 5.50 V Operational Vcc
- 5 V Tolerant I/Os in the Entire Supply Voltage Range
- Industrial Temperature: -40°C to 85°C
- Default Registers are Identical to the PC16552D
- NS16C2552/NS16C2752 is Pin-to-Pin Compatible to TI PC16552D, EXAR ST16C2552, XR16C2552, XR 16L2552, and Phillips SC16C2552B
- NS16C2752 is Compatible to EXAR XR16L2752, and Register Compatible to Phillips SC16C752
- Auto Hardware Flow Control (Auto-CTS, Auto-RTS)
- Auto Software Flow Control (Xon, Xoff, and Xon-any)
- Fully Programmable Character Length (5, 6, 7, or 8) with Even, Odd, or No Parity, Stop Bit
- Adds or Deletes Standard Asynchronous Communication Bits (Start, Stop, and Parity) to or from the Serial Data
- Independently Controlled and Prioritized Transmit and Receive Interrupts
- Complete Line Status Reporting Capabilities
- Line Break Generation and Detection
- Internal Diagnostic Capabilities
- Loopback Controls for Communications Link Fault Isolation
- Break, Parity, Overrun, Framing Error Detection
- Programmable Baud Generators Divide any Input Clock by 1 to (216 - 1) and Generate the 16 X clock
- IrDA v1.0 Wireless Infrared Encoder/Decoder
- DMA Operation (TXRDY/RXRDY)
- Concurrent Write to DUART Internal Register Channels 1 and 2
- Multi-Function Output Allows More Package Functions with Fewer I/O Pins
- 44-PLCC or 48-TQFP Package
All trademarks are the property of their respective owners.
The NS16C2552 and NS16C2752 are dual channel Universal Asynchronous Receiver/Transmitter (DUART). The footprint and the functions are compatible to the PC16552D, while new features are added to the UART device. These features include low voltage support, 5V tolerant inputs, enhanced features, enhanced register set, and higher data rate.
The two serial channels are completely independent of each other, except for a common CPU interface and crystal input. On power-up both channels are functionally identical to the PC16552D. Each channel can operate with on-chip transmitter and receiver FIFO’s (in FIFO mode).
In the FIFO mode each channel is capable of buffering 16 bytes (for NS16C2552) or 64 bytes (for NS16C2752) of data in both the transmitter and receiver. The receiver FIFO also has additional 3 bits of error data per location. All FIFO control logic is on-chip to minimize system software overhead and maximize system efficiency.
To improve the CPU processing bandwidth, the data transfers between the DUART and the CPU can be done using DMA controller. Signaling for DMA transfers is done through two pins per channel (TXRDY and RXRDY). The RXRDYfunction is multiplexed on one pin with the OUT2 and BAUDOUT functions. The configuration is through Alternate Function Register.
The fundamental function of the UART is converting between parallel and serial data. Serial-to-parallel conversion is done on the UART receiver and parallel-to-serial conversion is done on the transmitter. The CPU can read the complete status of each channel at any time. Status information reported includes the type and condition of the transfer operations being performed by the DUART, as well as any error conditions (parity, overrun, framing, or break interrupt).
The NS16C2552 and NS16C2752 include one programmable baud rate generator for each channel. Each baud rate generator is capable of dividing the clock input by divisors of 1 to (216 - 1), and producing a 16X clock for driving the internal transmitter logic and for receiver sampling circuitry. The NS16C2552 and NS16C2752 have complete MODEM-control capability, and a processor-interrupt system. The interrupts can be programmed by the user to minimize the processing required to handle the communications link.
技术文档
类型 | 标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 数据表 | NS16C2552/2752 Dual UART w/ 16-byte/64-byte FIFO's and up to 5 Mbit/s Data Rate 数据表 (Rev. D) | 2013年 4月 16日 |
设计和开发
如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。
PSPICE-FOR-TI — 适用于 TI 设计和模拟工具的 PSpice®
借助 PSpice for TI 的设计和仿真环境及其内置的模型库,您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案,然后再进行布局和制造,可缩短产品上市时间并降低开发成本。
在 PSpice for TI 设计和仿真工具中,您可以搜索 TI (...)
TINA-TI — 基于 SPICE 的模拟仿真程序
TINA-TI 安装需要大约 500MB。直接安装,如果想卸载也很容易。我们相信您肯定会爱不释手。
TINA 是德州仪器 (TI) 专有的 DesignSoft 产品。该免费版本具有完整的功能,但不支持完整版 TINA 所提供的某些其他功能。
如需获取可用 TINA-TI 模型的完整列表,请参阅:SpiceRack - 完整列表
需要 HSpice (...)
封装 | 引脚 | CAD 符号、封装和 3D 模型 |
---|---|---|
PLCC (FN) | 44 | Ultra Librarian |
TQFP (PFB) | 48 | Ultra Librarian |
订购和质量
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 鉴定摘要
- 持续可靠性监测
- 制造厂地点
- 封装厂地点