LPC662 低功耗 CMOS 双路运算放大器 | 德州仪器 TI.com.cn

LPC662 (正在供货) 低功耗 CMOS 双路运算放大器

低功耗 CMOS 双路运算放大器 - LPC662


The LPC662 CMOS Dual operational amplifier is ideal for operation from a single supply. It features a wide range of operating voltage from +5V to +15V, rail-to-rail output swing in addition to an input common-mode range that includes ground. Performance limitations that have plagued CMOS amplifiers in the past are not a problem with this design. Input VOS, drift, and broadband noise as well as voltage gain (into 100 k and 5 k) are all equal to or better than widely accepted bipolar equivalents, while the power supply requirement is typically less than 0.5 mW.

This chip is built with National's advanced Double-Poly Silicon-Gate CMOS process.

See the LPC660 datasheet for a Quad CMOS operational amplifier and LPC661 for a single CMOS operational amplifier with these same features.


Rail-to-rail output swing


Micropower operation (<0.5 mW)


Specified for 100 k and 5 k loads


High voltage gain

120 dB

Low input offset voltage

3 mV

Low offset voltage drift

1.3 µV/°C

Ultra low input bias current

2 fA

Input common-mode includes GND


Operating range from +5V to +15V


Low distortion

0.01% at 1 kHz

Slew rate

0.11 V/µs

Full military temperature range available



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Part number 立即下单 Number of channels (#) Total supply voltage (Min) (+5V=5, +/-5V=10) Total supply voltage (Max) (+5V=5, +/-5V=10) GBW (Typ) (MHz) Slew rate (Typ) (V/us) Rail-to-rail Vos (offset voltage @ 25 C) (Max) (mV) Iq per channel (Typ) (mA) Vn at 1 kHz (Typ) (nV/rtHz) Rating Operating temperature range (C) Package Group Package size: mm2:W x L (PKG) Offset drift (Typ) (uV/C) Features Input bias current (Max) (pA) CMRR (Typ) (dB) Output current (Typ) (mA) Architecture
LPC662 立即下单 2     5     15     0.35     0.11     In to V-
3     0.043     42     Catalog     -40 to 85     SOIC | 8     8SOIC: 19 mm2: 3.91 x 4.9 (SOIC | 8)     1.3         4     83     21     CMOS